User Manual

Page 14
table of Contents
revise history ...................................................................................... 0
Picture list ........................................................................................................................................................................................... 4
1. Bumblebee kernel overview ............................................................................................................................................................ 5
1.1. Bumblebee kernel feature list .......................................................................................................................... 5
1.2. Bumblebee kernel instruction set and architecture .................................................................................. 8
1.3. Bumblebee kernel hierarchy diagram ................................................................................................................ 9
2. Introduction to Bumblebee Kernel Features .......................................................................................................................... 11
2.1. Bumblebee kernel clock domain introduction .............................................................................................. 11
2.2. Bumblebee kernel power domain introduction .............................................................................................. 12
2.3. Introduction to the Bumblebee Kernel Interface ...................................................................................... 13
2.4. Bumblebee kernel address space allocation ................................................................................................ 13
2.5. Privileged mode of the Bumblebee kernel .................................................................................................... 13
2.6. Memory resources of the Bumblebee kernel .................................................................................................. 14
2.7. Bumblebee kernel private device .................................................................................................................... 15
2.8. Physical storage protection for the Bumblebee kernel ......................................................................... 17
2.9. Bumblebee kernel debugging mechanism .......................................................................................................... 17
2.10. Bumblebee kernel interrupt and exception mechanism ................................................................. 17
2.11. NMI mechanism of the Bumblebee kernel ........................................................................................... 18
2.12. Bumblebee kernel CSR register ........................................................................................................... 19
2.13. Performance counters for the Bumblebee kernel ........................................................................... 19
2.14. Timer unit of the Bumblebee kernel ................................................................................................. 21
2.14.1. Timer behavior when debugging mode .................................................... 21
2.14.2. Timer behavior in normal mode ......................................................... 22
2.15. Low-power mechanism of the Bumblebee core ................................................................................... 23
2.15.1. Clock control into sleep state ........................................................ 23
2.15.2. Clock control to exit sleep ........................................................... 24