User Manual
2012-2017 Microchip Technology Inc. Advance Information DS40001667E-page 17
MGC3030/3130
4.0 FUNCTIONAL DESCRIPTION
Microchip Technology’s MGC3X30 configurable
controller uses up to five E-field receiving electrodes.
Featuring a Signal Processing Unit (SPU), a wide
range of 3D gesture applications are being pre-
processed on the MGC3X30, which allows short
development cycles, as no host processing is needed.
Always-on 3D sensing, even for battery-driven mobile
devices, is enabled due to the chip’s low-power design
and variety of programmable power modes. A Self
Wake-up mode triggers interrupts to the application
host reacting to interaction of a user with the device
and supporting the host system in overall power
reduction.
The MGC3X30 offers one enhanced I
2
C™ interface in
including SDA, SCL and TS line (EIO0) for data
exchange with a host controller.
GestIC
®
sensing electrodes are driven by a low-volt-
age signal with a frequency in the range of 100 kHz,
which allows their electrical conductive structure to be
made of any low-cost material. Even the reuse of exist-
ing conductive structures, such as a display’s ITO coat-
ing, is feasible, making the MGC3X30 an overall, very
cost-effective system solution.
Figure 4-1 provides an overview of the main building
blocks of MGC3X30. These blocks will be described in
the following sections.
FIGURE 4-1: MGC3X30 CONTROLLER BLOCK DIAGRAM
Host
Signal
processing
unit (SPU)
Power management
unit (PMU)
Internal clockTX signal generation
External
electrodes
Communication
control (I2C)
MGC3030/
3130 Controller
Signal
conditioning
ADC
Signal
conditioning
ADC
Signal
conditioning
ADC
Signal
conditioning
ADC
Signal
conditioning
ADC
FLASH
memory
Gesture Port
and Interface
Selection
Reset block
Voltage reference
(VREF)
TXD
RX0
RX1
RX2
RX3
RX4
MCLR
SI0
SI1
EIO1/IS1
EIO2
EIO3
IS2
EIO0
INTERNAL BUS
Low power
wake-up
Hos
t
S
i
g
nal
p
rocess
i
n
g
u
n
it
(
S
P
U
)
Po
w
e
r
m
anagement
u
nit
(
(
PMU
)
)
I
nt
e
rn
al
clock
TX
s
ig
na
l
g
enerat
i
on
Ext
e
rn
a
l
ele
ctr
ode
s
C
ommunication
con
tr
ol
(
I
2
C
)
MGC
303
0
/
3130
C
ontroller
S
i
g
nal
con
di
t
i
on
i
n
g
A
D
C
Si
g
nal
con
di
t
i
on
ing
A
D
C
Si
g
nal
con
di
t
i
on
i
n
g
A
D
C
S
i
g
nal
con
di
t
i
on
i
n
g
A
D
C
S
ignal
con
di
t
i
on
i
n
g
A
D
C
FLA
S
H
mem
ory
y
G
esture Port
a
n
d
Int
e
rf
ace
S
electio
n
Rese
t
block
V
oltage re
f
erence
(
(
VREF
)
)
TXD
RX
0
RX
1
RX
2
RX
3
RX
4
MC
L
R
S
I
0
S
I
1
E
I
O
1
/
I
S
1
E
I
O
2
EI
O
3
IS
2
E
I
O
0
I
NTERNAL BU
S
L
ow powe
r
w
ake
-
u
p
p
EIO6
EIO7