Datasheet

Beijing Winner Microelectronics Co., Ltd.
10
6.14 UART Controller
⚫ Support APB bus protocol;
⚫ Support Interrupt or polling;
⚫ Support DMA, Separate receive/transmit 32 bytes entry FIFO buffer;
⚫ Programmable baud rate;
⚫ Programmable number of data bit, 5-8bit, and parity bit;
⚫ Programmable stop bit, 1 or 2;
⚫ Support auto flow control/flow control function;
⚫ Support Break frame;
⚫ Support interrupt of overrun, parity error, frame error, rx break frame;
⚫ Up to 16-burst byte DMA data transfer;
6.15 GPIO Controller
Has 48-bit configurable GPIO, programmable input or output, configurable interrupt.
GPIOA and GPIOB have the same function with different base address.
6.16 Timer Controller
Configurable us or ms Timer, has 6 programmable 32-bit timers, Use interrupt flag to detect Time out.
6.17 Watchdog
The Watchdog is used to perform a system reset when system runs into an unknown state. The system
software must respond to a periodic interruption, otherwise a hard reset will be generated.
6.18 RF Configurator
Support SPI bus protocol. The operating clock is system clock. The main features of the bus is：
⚫ Provides separate 1-word depth transmit and receive FIFO buffers;
6.19 RF Transceiver
⚫ The RF transceiver includes a power amplifier, a transmission channel, a receiving channel, a phase
locked loop and a SPI, which changes the working state of the chip by the signals SHDN, RXEN and
TXEN;
⚫ The receiving channel uses the zero intermediate frequency structure to convert the RF signal directly