Datasheet
Table Of Contents
- About This Guide
- Chapter1 Overview
- Chapter2 Pin Specifications
- Chapter3 Functional Description
- 3.1 CPU
- 3.2 Neural Network Processor (KPU)
- 3.3 Audio Processor (APU)
- 3.4 Static Random-Access Memory (SRAM)
- 3.5 System Controller (SYSCTL)
- 3.6 Field Programmable IO Array (FPIOA/IOMUX)
- 3.7 One-Time Programmable Memory (OTP)
- 3.8 AES Accelerator
- 3.9 Digital Video Port (DVP)
- 3.10 FFT Accelerator
- 3.11 SHA256 Accelerator
- 3.12 Universal Asynchronous Transceiver (UART)
- 3.13 Watchdog Timer (WDT)
- 3.14 General Purpose Input/Output Interface (GPIO)
- 3.15 Direct Memory Access Controller (DMAC)
- 3.16 Inter-Integrated Circuit Bus (I²C)
- 3.17 Serial Peripheral Interface (SPI)
- 3.18 Inter-Integrated Sound (I²S)
- 3.19 TIMER
- 3.20 Read Only Memory (ROM)
- 3.21 Real Time Clock (RTC)
- 3.22 Pulse Width Modulation (PWM)
- Chapter4 Electrical Characteristics
- Chapter5 Package information

Chapter2 Pin Specifications 10
Ball Name Type Function Reset State
J10 VSS S Ground VSS
J11 IO_2 I/O Multifunctional IO (FPIOA)(Bank 0,Group A) JTAG_TMS
J12 IO_3 I/O Multifunctional IO (FPIOA)(Bank 0,Group A) JTAG_TDO
K1 F_CLK O Dedicated SPI GPIO (1.8V only) F_CLK
K2 VSS S Ground VSS
K3 VSS S Ground VSS
K4 VSSPLL S PLL analog ground, noise sensitive VSSPLL
K5 VSS S Ground VSS
K6 VDDIO18 S 1.8V supply for low voltage IO VDDIO18
K7 VSS S Ground VSS
K8 VDDIO18 S 1.8V supply for low voltage IO VDDIO18
K9 VSS S Ground VSS
K10 VSS S Ground VSS
K11 IO_0 I/O Multifunctional IO (FPIOA)(Bank 0,Group A) JTAG_TCLK
K12 IO_1 I/O Multifunctional IO (FPIOA)(Bank 0,Group A) JTAG_TDI
L1 F_D3 I/O Dedicated SPI GPIO (1.8V only) F_D3
L2 VSS S Ground VSS
L3 OSC_CLK O Active oscillator output OSC_CLK
L4 VDDPLL S 0.9V PLL Analog Supply VDDPLL
L5 SPI0_D7 O Dedicated SPI0 D7 output (FLOAT*)
L6 SPI0_D6 O Dedicated SPI0 D6 output (FLOAT*)
L7 SPI0_D5 O Dedicated SPI0 D5 output (FLOAT*)
L8 SPI0_D4 O Dedicated SPI0 D4 output (FLOAT*)
L9 SPI0_D3 O Dedicated SPI0 D3 output (FLOAT*)
L10 SPI0_D2 O Dedicated SPI0 D2 output (FLOAT*)
L11 SPI0_D1 O Dedicated SPI0 D1 output (FLOAT*)
L12 SPI0_D0 O Dedicated SPI0 D0 output (FLOAT*)
M1 RESET I System Reset, active low RESET
M2 CLK I System Clock input CLK
M3 XTAL_OUT O Passive Crystal Oscillator output (crystal only) XTAL_OUT
M4 XTAL_IN I Passive Crystal Oscillator input (crystal only) XTAL_IN
M5 DVP_D7 I Dedicated DVP D7 input (FLOAT*)
M6 DVP_D6 I Dedicated DVP D6 input (FLOAT*)
M7 DVP_D5 I Dedicated DVP D5 input (FLOAT*)
M8 DVP_D4 I Dedicated DVP D4 input (FLOAT*)