Datasheet
Table Of Contents
- About This Guide
- Chapter1 Overview
- Chapter2 Pin Specifications
- Chapter3 Functional Description
- 3.1 CPU
- 3.2 Neural Network Processor (KPU)
- 3.3 Audio Processor (APU)
- 3.4 Static Random-Access Memory (SRAM)
- 3.5 System Controller (SYSCTL)
- 3.6 Field Programmable IO Array (FPIOA/IOMUX)
- 3.7 One-Time Programmable Memory (OTP)
- 3.8 AES Accelerator
- 3.9 Digital Video Port (DVP)
- 3.10 FFT Accelerator
- 3.11 SHA256 Accelerator
- 3.12 Universal Asynchronous Transceiver (UART)
- 3.13 Watchdog Timer (WDT)
- 3.14 General Purpose Input/Output Interface (GPIO)
- 3.15 Direct Memory Access Controller (DMAC)
- 3.16 Inter-Integrated Circuit Bus (I²C)
- 3.17 Serial Peripheral Interface (SPI)
- 3.18 Inter-Integrated Sound (I²S)
- 3.19 TIMER
- 3.20 Read Only Memory (ROM)
- 3.21 Real Time Clock (RTC)
- 3.22 Pulse Width Modulation (PWM)
- Chapter4 Electrical Characteristics
- Chapter5 Package information
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About This Guide
This document provides the specifications of Kendryte family of chips.
Revision History
Date Ver. Revision History
2018-09-01 V0.1.0 Initial release
2018-09-13 V0.1.1 Fixing the wrong description in SPI and GPIO
2018-09-14 V0.1.2 Correction of errors in Chapter 1
2018-09-17 V0.1.3 Correction of pin description error in Chapter 2
2018-09-18 V0.1.4 Adding Kendryte system architecture diagram
2018-09-19 V0.1.5 Fixed an error description of the timer
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