Datasheet
Table Of Contents
- About This Guide
- Chapter1 Overview
- Chapter2 Pin Specifications
- Chapter3 Functional Description
- 3.1 CPU
- 3.2 Neural Network Processor (KPU)
- 3.3 Audio Processor (APU)
- 3.4 Static Random-Access Memory (SRAM)
- 3.5 System Controller (SYSCTL)
- 3.6 Field Programmable IO Array (FPIOA/IOMUX)
- 3.7 One-Time Programmable Memory (OTP)
- 3.8 AES Accelerator
- 3.9 Digital Video Port (DVP)
- 3.10 FFT Accelerator
- 3.11 SHA256 Accelerator
- 3.12 Universal Asynchronous Transceiver (UART)
- 3.13 Watchdog Timer (WDT)
- 3.14 General Purpose Input/Output Interface (GPIO)
- 3.15 Direct Memory Access Controller (DMAC)
- 3.16 Inter-Integrated Circuit Bus (I²C)
- 3.17 Serial Peripheral Interface (SPI)
- 3.18 Inter-Integrated Sound (I²S)
- 3.19 TIMER
- 3.20 Read Only Memory (ROM)
- 3.21 Real Time Clock (RTC)
- 3.22 Pulse Width Modulation (PWM)
- Chapter4 Electrical Characteristics
- Chapter5 Package information

Chapter3 Functional Description 20
• 32-bit or 64-bit input data width
• Supports pure-real, pure-imaginary or complex input data
• DMA transfer support
3.11 SHA256 Accelerator
The SHA256 accelerator is a computational unit used to calculate SHA-256:
• SHA-256 calculation
• DMA transfer support for input data
3.12 Universal Asynchronous Transceiver (UART)
3.12.1 High Speed UART:
High speed UART UARTHS(UART0)
• Baud rate up to 5Mbps
• 8-byte transmit and receive FIFO
• Programmable THRE interrupt
• Does not support hardware flow control or other modem control signals, or
synchronous serial data protocols
3.12.2 General Purpose UART:
UART1, UART2 and UART3 are general purpose UARTs and support asynchronous com-
munication (RS232/RS485/IRDA), baud rate up to 5Mbps, hardware flow control using
CTS/RTS or (XON/XOFF). All three interfaces can be accessed by DMA or directly by
the CPU.
• 8-byte transmit and receive FIFO
• Asynchronous clock support
– In order to cope with the CPU’s baud rate requirement for data synchro-
nization, the UART can configure the data clock separately for transmit
and receive. The full-duplex mode can ensure the synchronization of data
in the two clock domains.
• RS485 interface support
– The UART can be configured by software into RS485 mode. The default is