Datasheet
Table Of Contents
- About This Guide
- Chapter1 Overview
- Chapter2 Pin Specifications
- Chapter3 Functional Description
- 3.1 CPU
- 3.2 Neural Network Processor (KPU)
- 3.3 Audio Processor (APU)
- 3.4 Static Random-Access Memory (SRAM)
- 3.5 System Controller (SYSCTL)
- 3.6 Field Programmable IO Array (FPIOA/IOMUX)
- 3.7 One-Time Programmable Memory (OTP)
- 3.8 AES Accelerator
- 3.9 Digital Video Port (DVP)
- 3.10 FFT Accelerator
- 3.11 SHA256 Accelerator
- 3.12 Universal Asynchronous Transceiver (UART)
- 3.13 Watchdog Timer (WDT)
- 3.14 General Purpose Input/Output Interface (GPIO)
- 3.15 Direct Memory Access Controller (DMAC)
- 3.16 Inter-Integrated Circuit Bus (I²C)
- 3.17 Serial Peripheral Interface (SPI)
- 3.18 Inter-Integrated Sound (I²S)
- 3.19 TIMER
- 3.20 Read Only Memory (ROM)
- 3.21 Real Time Clock (RTC)
- 3.22 Pulse Width Modulation (PWM)
- Chapter4 Electrical Characteristics
- Chapter5 Package information

26
Chapter 4
Electrical Characteristics
Parameter Name Min Typ Max Unit
3.3V/1.8V IO supply voltage V DD - 3.3/1.8 - V
1.8V Digital supply voltage DV DD
1.8V
- 1.8 - V
1.8V Analog supply voltage AV DD
1.8V
- 1.8 - V
0.9V Core supply voltage V DD
0.9V
- 0.9 - V
3.3V IO supply current I
3.3V
1 - - mA
1.8V Digital supply current I
1.8V
1 - - mA
1.8V Analog supply current I
1.8V
2 - - mA
0.9V Core supply current I
0.9V
30 - - mA
3.3V/1.8V IO input high level V
IH
0.7 ∗ V DD - - V
3.3V/1.8V IO input low level V
IL
- - 0.3 ∗ V DD V
IO High output level V
OH
- V DD − 0.3 - mV
IO Low output level V
OL
- 0.3 - mV
IO Input leakage current I
IL
- TBD
*
1
- nA
IO Input capacitance C
P AD
- TBD - pF
Storage Temperature T
ST R
−40 25 150
◦
C
Operating Temperature T
OP R
−40 25 125
◦
C
4.1 Programmable Drive Capability
Low Level Output Current
*
1
Testing of this data is still in progress, and will be published in a future version of this docu-
ment










