Datasheet
Table Of Contents
- About This Guide
- Chapter1 Overview
- Chapter2 Pin Specifications
- Chapter3 Functional Description
- 3.1 CPU
- 3.2 Neural Network Processor (KPU)
- 3.3 Audio Processor (APU)
- 3.4 Static Random-Access Memory (SRAM)
- 3.5 System Controller (SYSCTL)
- 3.6 Field Programmable IO Array (FPIOA/IOMUX)
- 3.7 One-Time Programmable Memory (OTP)
- 3.8 AES Accelerator
- 3.9 Digital Video Port (DVP)
- 3.10 FFT Accelerator
- 3.11 SHA256 Accelerator
- 3.12 Universal Asynchronous Transceiver (UART)
- 3.13 Watchdog Timer (WDT)
- 3.14 General Purpose Input/Output Interface (GPIO)
- 3.15 Direct Memory Access Controller (DMAC)
- 3.16 Inter-Integrated Circuit Bus (I²C)
- 3.17 Serial Peripheral Interface (SPI)
- 3.18 Inter-Integrated Sound (I²S)
- 3.19 TIMER
- 3.20 Read Only Memory (ROM)
- 3.21 Real Time Clock (RTC)
- 3.22 Pulse Width Modulation (PWM)
- Chapter4 Electrical Characteristics
- Chapter5 Package information

Contents iv
3.10 FFT Accelerator . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.11 SHA256 Accelerator . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.12 Universal Asynchronous Transceiver (UART) . . . . . . . . . . . . . 20
3.13 Watchdog Timer (WDT) . . . . . . . . . . . . . . . . . . . . . . . . 21
3.14 General Purpose Input/Output Interface (GPIO) . . . . . . . . . . . 22
3.15 Direct Memory Access Controller (DMAC) . . . . . . . . . . . . . . . 22
3.16 Inter-Integrated Circuit Bus (I²C) . . . . . . . . . . . . . . . . . 23
3.17 Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . 23
3.18 Inter-Integrated Sound (I²S) . . . . . . . . . . . . . . . . . . . . 23
3.19 TIMER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
3.20 Read Only Memory (ROM) . . . . . . . . . . . . . . . . . . . . . . . 24
3.21 Real Time Clock (RTC) . . . . . . . . . . . . . . . . . . . . . . . 25
3.22 Pulse Width Modulation (PWM) . . . . . . . . . . . . . . . . . . . . 25
Chapter4 Electrical Characteristics 26
4.1 Programmable Drive Capability . . . . . . . . . . . . . . . . . . . 26
Chapter5 Package information 28










