Data Sheet

1042
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
Fix/Workaround:
None
3 - If the SERCOM is enabled in SPI mode with SSL detection enabled
(CTRLB.SSDE) and CTRLB.RXEN=1, an erroneous slave select low interrupt
(INTFLAG.SSL) can be generated. Errata reference: 13369
Fix/Workaround:
Enable the SERCOM first with CTRLB.RXEN=0. In a subsequent write, set
CTRLB.RXEN=1.
4 - In TWI master mode, an ongoing transaction should be stalled
immediately when DBGCTRL.DBGSTOP is set and the CPU enters debug
mode. Instead, it is stopped when the current byte transaction is completed
and the corresponding interrupt is triggered if enabled. Errata reference:
12499
Fix/Workaround:
In TWI master mode, keep DBGCTRL.DBGSTOP=0 when in debug mode.
39.1.3.8 TC
1 - Spurious TC overflow and Match/Capture events may occur. Errata
reference: 13268
Fix/Workaround:
Do not use the TC overflow and Match/Capture events. Use the corresponding
Interrupts instead.
39.1.3.9 TCC
1 - In RAMP 2 mode with Fault keep, qualified and restart: Errata reference:
13262
If a fault occurred at the end of the period during the qualified state, the switch to
the next ramp can have two restarts.
Fix/Workaround:
Avoid faults few cycles before the end or the beginning of a ramp.
2 - With blanking enabled, a recoverable fault that occurs during the first
increment of a rising TCC is not blanked. Errata reference: 12519
Fix/Workaround:
None
3 - In Dual slope mode a Retrigger Event does not clear the TCC counter.
Errata reference: 12354
Fix/Workaround:
None