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Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
1: The XOSC Ready interrupt is enabled, and an interrupt request will be generated when the XOSC Ready Inter-
rupt flag is set.
Writing a zero to this bit has no effect.
Writing a one to this bit will set the XOSC Ready Interrupt Enable bit, which enables the XOSC Ready interrupt.