Data Sheet

536

Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181G–SAM-D21_Datasheet–09/2015

27.8 Register Description

Registers can be 8, 16 or 32 bits wide. Atomic 8-, 16- and 32-bit accesses are supported. In addition, the 8-bit quarters

and 16-bit halves of a 32-bit register and the 8-bit halves of a 16-bit register can be accessed directly.

Some registers are optionally write-protected by the Peripheral Access Controller (PAC). Write-protection is denoted by

the Write-Protected property in each individual register description. Please refer to“Register Access Protection” on page

513 for details.

Some registers require synchronization when read and/or written. Synchronization is denoted by the Write-Synchronized

or the Read-Synchronized property in each individual register description. Please refer to “Synchronization” on page 530

for details.

Some registers are enable-protected, meaning they can only be written when the I

C is disabled. Enable-protection is

denoted by the Enable-Protected property in each individual register description.