Data Sheet

Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181G–SAM-D21_Datasheet–09/2015

27.8.1.2 Control B

Name: CTRLB

Offset: 0x04

Reset: 0x00000000

Property: Write-Protected, Enable-Protected, Write-Synchronized

z Bits 31:19 – Reserved

These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to

zero when this register is written. These bits will always return zero when read.

z Bit 18 – ACKACT: Acknowledge Action

0: Send ACK

1: Send NACK

The Acknowledge Action (ACKACT) bit defines the slave's acknowledge behavior after an address or data byte is

received from the master. The acknowledge action is executed when a command is written to the CMD bits. If

smart mode is enabled (CTRLB.SMEN is one), the acknowledge action is performed when the DATA register is

read.

This bit is not enable-protected.

z Bits 17:16 – CMD[1:0]: Command

Writing the Command bits (CMD) triggers the slave operation as defined in Table 27-7. The CMD bits are strobe

bits, and always read as zero. The operation is dependent on the slave interrupt flags, INTFLAG.DRDY and INT-

FLAG.AMATCH, in addition to STATUS.DIR (See Table 27-7).

Bit3130292827262524

AccessRRRRRRRR

Reset00000000

Bit2322212019181716

ACKACT CMD[1:0]

AccessRRRRRR/WR/WR/W

Reset00000000

Bit151413121110 9 8

AMODE[1:0]

AACKEN GCMD SMEN

Access R/W R/W R R R R/W R/W R/W

Reset00000000

Bit76543210

AccessRRRRRRRR

Reset00000000