Data Sheet

567
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
27.8.2.8 Syncbusy
Name: SYNCBUSY
Offset: 0x1C
Reset: 0x00000000
Property:
z Bits 31:3 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to
zero when this register is written. These bits will always return zero when read.
z Bit 2– SYSOP: System Operation Synchronization Busy
Writing CTRLB, STATUS.BUSSTATE, ADDR, or DATA when the SERCOM is enabled requires synchronization.
When written, the SYNCBUSY.SYSOP bit will be set until synchronization is complete.
0: System operation synchronization is not busy.
1: System operation synchronization is busy.
z Bit 1 – ENABLE: SERCOM Enable Synchronization Busy
Enabling and disabling the SERCOM (CTRLA.ENABLE) requires synchronization. When written, the SYNC-
BUSY.ENABLE bit will be set until synchronization is complete.
Writes to any register (except for CTRLA.SWRST) while enable synchronization is on-going will be discarded and
an APB error will be generated.
0: Enable synchronization is not busy.
1: Enable synchronization is busy.
Bit3130292827262524
AccessRRRRRRRR
Reset00000000
Bit2322212019181716
AccessRRRRRRRR
Reset00000000
Bit151413121110 9 8
AccessRRRRRRRR
Reset00000000
Bit76543210
SYSOP ENABLE SWRST
AccessRRRRRRRR
Reset00000000