Data Sheet

922
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181G–SAM-D21_Datasheet–09/2015
34.8.2 Control B
Name: CTRLB
Offset: 0x1
Reset: 0x00
Property: Write-Protected
z Bits 7:6 – REFSEL[1:0]: Reference Selection
These bits select the reference voltage for the DAC according to the table below.
Table 34-3. Reference Selection
z Bit 5 – Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write this bit to zero
when this register is written. This bit will always return zero when read.
z Bit 4 – BDWP: Bypass DATABUF Write Protection
This bit can bypass DATABUF write protection.
0: DATABUF register is write-protected by Peripheral Access Controller.
1: DATABUF register is not write-protected.
z Bit 3 – VPD: Voltage Pump Disable
This bit controls the behavior of the voltage pump.
0: Voltage pump is turned on/off automatically.
1: Voltage pump is disabled.
z Bit 2 – LEFTADJ: Left Adjusted Data
This bit controls how the 10-bit conversion data is adjusted in the Data and Data Buffer registers.
0: DATA and DATABUF registers are right-adjusted.
1: DATA and DATABUF registers are left-adjusted.
z Bit 1 – IOEN: Internal Output Enable
0: Internal DAC output not enabled.
1: Internal DAC output enabled to be used by the AC.
z Bit 0 – EOEN: External Output Enable
0: The DAC output is turned off.
1: The high-drive output buffer drives the DAC output to the V
OUT
pin.
Bit 76543210
REFSEL[1:0]
BDWP VPD LEFTADJ IOEN EOEN
AccessR/WR/W R R/WR/WR/WR/WR/W
Reset00000000
REFSEL[1:0] Name Description
0x0 INT1V Internal 1.0V reference
0x1 AVCC AVCC
0x2 VREFP External reference
0x3 Reserved