Data Sheet

DocID024849 Rev 2 22/96
STM32F030x4/6/8/C Functional overview
23
In addition, I2C1 provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP
capability, Host notify protocol, hardware CRC (PEC) generation/verification, timeouts
verifications and ALERT protocol management
The I2C interfaces can be served by the DMA controller.
Refer to Table 7 for the differences between I2C1 and I2C2.
3.14 Universal synchronous/asynchronous receiver transmitters
(USART)
The device embeds up to six universal synchronous/asynchronous receiver transmitters
(USART1, USART2 and USART3, USART4, USART5, USART6 on STM32F030xC devices
only), which communicate at speeds of up to 6 Mbit/s.
They provide hardware management of the CTS and RTS signals, multiprocessor
communication mode, master synchronous communication and single-wire half-duplex
communication mode. USART1 supports also the auto baud rate feature.
The USART interfaces can be served by the DMA controller.
Table 7. STM32F030x4/6/8/C I
2
C implementation
I2C features
(1)
1. X = supported.
I2C1 I2C2
(2)
2. Only available on STM32F030x8/C devices.
7-bit addressing mode X X
10-bit addressing mode X X
Standard mode (up to 100 kbit/s) X X
Fast mode (up to 400 kbit/s) X X
Fast Mode Plus (up to 1 Mbit/s) with 20mA
output drive I/Os X -
Independent clock X -
SMBus X -
Wakeup from STOP - -
Table 8. STM32F030x4/6/8/C USART implementation
(1)
USART modes/features USART1 USART2
(2)
USART2
(3)
,
USART3
(3)
USART4
(3)
USART5
(3)
USART6
(3)
Hardware flow control for modem X X X X - -
Continuous communication using
DMA
XX X XXX
Multiprocessor communication X X X X X X
Synchronous mode X X X X X -
Single-wire half-duplex
communication
XX X XXX
Receiver timeout interrupt X - X - - -
Auto baud rate detection X - X - - -