User's Manual
Table Of Contents
- GENERAL INFORMATION AND REQUIREMENTS
- INTRODUCTION
- EQUIPMENT DESCRIPTION
- Electronics Cabinet
- Local Control Unit (LCU) (1A1)
- Synthesizer Assembly (1A3A1, 1A3A11)
- Audio Generator CCA (1A3A2, 1A3A9)
- Monitor CCA (1A3A3, 1A3A10)
- Low Voltage Power Supply (LVPS) CCA (1A3A4, 1A3A8)
- Test Generator CCA (1A3A5)
- Remote Monitoring System (RMS) Processor CCA ( 1A3A6)
- Facilities CCA (1A3A7)
- Sideband Amplifier Assembly (1A4A1, 1A4A2, 1A4A6, 1A4A7)
- RF Monitor Assembly (1A4A4)
- Commutator Control CCA (1A4A5)
- Battery Charging Power Supply (BCPS) Assembly (1A5A1, 1A5A2)
- Carrier Power Amplifier Assembly (1A5A3, 1A5A4)
- Interface CCA (1A9)
- AC Power Monitor Assembly (1A6)
- Commutator CCA (1A10, 1A11)
- Portable Maintenance Data Terminal (PMDT)
- Transmitting Antenna System
- Field Monitor Antenna
- Counterpoise
- Equipment Shelter
- Battery Backup Unit (Optional)
- Electronics Cabinet
- EQUIPMENT SPECIFICATION DATA
- EQUIPMENT AND ACCESSORIES SUPPLIED
- OPTIONAL EQUIPMENT
- TECHNICAL DESCRIPTION
- INTRODUCTION
- OPERATING PRINCIPLES
- DVOR TRANSMITTER THEORY OF OPERATION
- Simplified System Block Diagram
- System Block Diagram Theory
- Frequency Synthesizer (1A3A1, 1A3A11)
- Audio Generator CCA (1A7, 1A23) Theory
- Audio Generator CCA Detailed Circuit Theory
- CSB Power Amplifier Assembly (1A5A3, 1A5A4)
- Bi-Directional Coupler (1DC1)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A6, 1A5A7)
- RF Monitor Assembly (1A4A4) Theory
- RF Monitor Assembly Block Diagram Theory
- RMS Processor Block Diagram Theory
- Facilities CCA Theory
- Interface CCA Theory
- Interface CCA Block Diagram Theory
- AC Power Monitor CCA Theory
- Local Control Unit Theory
- Local Control Unit Block Diagram Theory
- DC to DC Converter
- Power Fail Detectors
- Key Switch Registers
- Parallel Interface
- 1.8432MHz Oscillator/Divider Chains
- Positive Alarm Register
- Negative Alarm Register
- 20 Second Delay Counter
- LCU Transfer Control State Machine #1 and #2 and Discrete Controls
- LED Control
- Audible Alarm
- Monitor Alarm Interface
- Station Control Logic
- System Configuration Inputs
- Local Control Unit Block Diagram Theory
- Test Generator (1A3A5) CCA Theory
- Low Voltage Power Supply (1A3A4, 1A3A8) CCA Theory
- Monitor CCA (1A3A3, 1A3A9) Theory
- Power Panel Theory
- Battery Charger Power Supply (BCPS) Theory
- Battery Charger Detailed Circuit Theory
- Extender Board Block Diagram Theory
- Commutator Control CCA Theory
- Commutator CCA (1A10, 1A11) Theory
- PMDT (PORTABLE MAINTENANCE DATA TERMINAL (UNIT 2)
- BATTERIES (UNIT 3)
- FIELD MONITOR KIT (UNIT 4)
- OPERATION
- INTRODUCTION
- REMOTE CONTROL STATUS UNIT (RCSU)
- REMOTE STATUS UNIT (RSU)
- REMOTE STATUS DISPLAY UNIT (RSDU)
- PORTABLE MAINTENANCE DATA TERMINAL (PMDT)
- PMDT SCREENS
- General
- Menus
- System Status at a Glance - Sidebar Status and Control
- Screen Area
- Configuring the PMDT
- Connecting to the VOR
- RMS Screens
- Monitor Screens
- All Monitor Screens
- Monitor 1 & 2 Screens
- Transmitter Data Screens
- Transmitter Configuration Screens
- Transmitter Commands
- Diagnostics Screen
- Controlling the Transmitter via the PMDT
- RMM
- CONTROLS AND INDICATORS
- POWER CONTROL PANEL
- LOCAL CONTROL UNIT (LCU)
- BCPS Asssembly Assembly (1A5A3, 1A5A4)
- Carrier Amplifier Assembly (1A5A3, 1A5A4)
- Monitor CCA (1A3A3, 1A3A10)
- Remote Monitoring System (RMS) CCA
- Facilities CCA (1A3A7)
- Synthesizer CCA (1A3A1, 1A3A11)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A5, 1A4A6)
- Audio Generator CCA (1A3A2, 1A3A9)
- Low Voltage Power Supply (LVPS) CCA (1A3A4,1A3A8)
- Test Generator CCA (1A3A5)
- RF Monitor Assembly (1A4A4)
- STANDARDS AND TOLERANCES
- PERIODIC MAINTENANCE
- MAINTENANCE PROCEDURES
- INTRODUCTION
- PERFORMANCE CHECK PROCEDURES
- Battery Backup Transfer Performance Check
- Carrier Output Power Performance Check
- Carrier Frequency Performance Check
- Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Check
- Modulation Frequency Performance Check
- Antenna VSWR Performance Check
- Automatic Transfer Performance Checks (Dual Equipment only)
- VOR Monitor Performance Check
- Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2)
- RSCU Operation Performance Check
- Identification Frequency and Modulation Level Checks
- EQUIPMENT INSPECTION PROCEDURES
- ALIGNMENT PROCEDURES
- Battery Charging Power Supply (BCPS) Alignment Procedures
- Alarm Volume Adjustment Procedure
- RMS Facilities Exterior and Interior Temperature Calibration
- Reassign Main/Standby Transmitters (Dual Systems Only)
- Verification of BITE VSWR Calibration
- Verification of BITE Frequency Counter Calibration
- Verification of BITE Wattmeter Calibration
- RMS Lithium Battery Check Procedure
- Replacing RMS CPU (1A3A6) CCA
- Update of DVOR Software
- Changing the Station Rotation (Azimuth)
- Changing the Monitoring Offsets
- DME Keying Check
- DVOR Frequency Synthesizer Alignment
- DVOR Sideband Amplifier Alignment
- Antenna VSWR Check for New Frequency
- CORRECTIVE MAINTENANCE
- PARTS LIST
- INSTALLATION, INTEGRATION, AND CHECKOUT
- INTRODUCTION
- SITE INFORMATION
- UNPACKING AND REPACKING
- INPUT POWER REQUIREMENT SUMMARY
- INSTALLATION PROCEDURES
- Tools and Test Equipment Required
- Counterpoise and Shelter Foundation Installation
- Shelter Installation
- Counterpoise Installation
- Initial Conditions
- Sideband Antenna Installation
- Carrier Antenna Installation
- Installation of Field Monitor Antenna
- Antenna Cable Exterior Cable Entrance Installation
- Air Conditioner Installation
- Transmitter Cabinet Installation
- Battery Back Up Installation
- DC Voltage and Battery Installation
- AC Voltage Installation
- Connecting DME Keyer Wiring
- RCSU and RMM Connections
- Obstruction Light Installation and Wiring
- Cutting Antenna Cables to Proper Electrical Length
- Tuning the Antennas
- Sideband RF Feed Cables to Commutator Connections
- INSPECTION
- INITIAL STARTUP AND PRELIMINARY TESTING
- Input Voltage Checks
- Installing Modules in Transmitter Cabinet
- Turn on Procedure
- PMDT Hookup and Setup
- Site Adjustments and Configurations
- DVOR Station Power-Up
- Log-On Procedure
- Setting Date and Time
- Setting Station's Descriptor
- Password Change
- Setting System Configuration
- Transmitter Tuning Procedures
- Setting Transmitter Operating Parameters
- Setting Monitor Alarm Limits
- Setting Monitor Az Angle Low Limit
- Setting Monitor Az Angle High Limit
- Setting High Monitor 30 Hz Mod Low Limit
- Setting Monitor 30 Hz Mod High Limit
- Setting Monitor 9960 Hz Mod Low Limit
- Setting Monitor 9960 Hz Mod High Limit
- Setting Monitor 9960 Hz Dev Low Limit
- Setting Monitor 9960 Hz Dev High Limit
- Setting Monitor Field Intensity Low Limit
- Setting Monitor Field Intensity High Limits
- Records
- INSTALLATION VERIFICATION TEST
- SOFTWARE
- TROUBLESHOOTING SUPPORT
Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-57
The U75 DSP is used to provide high speed data collection and processing of the VOR signals. U6 is considered the
“
master” and U75 is the “slave”. The U75 DSP does not utilize external flash ROM, NVRAM or SDRAM. The U75
DSP includes an internal direct memory access (DMA) controller, serial ports, and general purpose input/output
(I/O). The instruction set for the U75 DSP is downloaded by the U6 DSP at startup. The U75 DSP operates using
only internal RAM. Communication between U6 and U75 is accomplished using the PPI (parallel) communication
method.
The internal UART of U75 is the debug port at J11. The debug RS232 ports are used only for factory purposes and
will not be used by the customer in the field.
Device U59 is a linear regulator than converts the 5 volts DC to 3.3 VDC to run the digital circuitry on the circuit
card. Device U37 converts the 12 VDC to 5 VDC to run the PLL and VCO buffer circuits. Device Q10 is a linear
regulator that converts the +12 VDC to +10 VDC for the VCO circuit.
Receiver Operation
Refer to Figure 11-14. The input signal enters from one of two antenna inputs P2:D or P2:E. Inductors L2 and L3
remove any DC charge on the antenna lines. Protection devices SG1 and SG2 remove transients from the input line
from lightning or ESD. Circuit U31 is used to select one of the two antenna inputs with U6 as the control. The signal
then passes through a pre-selector band pass filter. The signal is then routed through a selectable 16 dB attenuator
formed by R28, R30 and R32. At high signal levels the 16 dB attenuator is switched into the circuit otherwise it is
switched out. The user enables this attenuation using the PMDT configuration setting.
The signal then enters a 3 dB attenuator formed by R48, R49 and R51 and then into mixer MX1 and is mixed by the
output of the frequency synthesizer described later. The output is at 45 MHz and is the intermediate frequency signal
(IF). The signal is then amplified by fixed gain amplifier U38 with a nominal gain of 20 dB.
The 45 MHz IF signal then enters the crystal filter Y3 which provides a 3 dB bandwidth of 30 kHz. The rejection of
the adjacent channel 50 kHz away is greater than 50 dB. The signal is then amplified by fixed gain amplifier U68
with a nominal gain of 20 dB. The signal then enters the digitally controlled step attenuator U40. The settings of the
PMDT configuration control the attenuation setting.
Resistor R62 and zener diode CR6 create a -3.3 Vdc source for circuit U40. Circuit U22 switches the -3.3 Vdc
source to U40 only after the +5 Vdc source has stabilized.
The signal then is amplified by fixed gain (+20 dB) amplifier U43. The signal then enters mixer MX2 and is mixed
with fixed frequency of 44.875 MHz from oscillator Y4. The output of the mixer is 125 kHz enters the differential
amplifier U20. The output of U20 enters analog to digital converter U24. The A/D converter U24 continuously
samples the input signal and presents the result on the data bus to the DSP U75.
The composite detector is formed by sampling the 45 MHz IF through L37 and C191. Circuit U44 is a linear
detector which provides a representation of the modulation to the test point TP16 through U62A and an input to U6
DSP through U62B.
The Synthesizer controller U30 is a single chip that provides reference divider, VCO output divider, phase
comparator and charge pump. This chip is programmable from the U6 DSP to set the channel frequency. The output
is programmed 45 MHz lower than the station frequency to be monitored. Operational amplifier U34 is part of the
loop filter for the VCO control loop. Voltage controlled oscillator Y2 provides an output frequency from 63 MHz to
73 MHz to a 26 dB attenuator. The signal is then amplified by fixed gain amplifier U60 with a nominal gain of 20
dB
The signal is then split two directions by a 6 dB resistor splitter. One signal, enters a 4 db attenuator and then is fed
back to the PLL circuit U30. The second signal enters fixed gain (20 dB) amplifier U61. This signal is available at
TP4 and Mixer MX1.