User's Manual

Model 1150A DVOR
2-70 Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
Scope Synch is available on the ODD XFR signal at test point TP1. Power for the CCA enters via P1-17, P1-18,
P1-20, and P1-21. Diodes CR4 and CR6 form an “OR” for the two +28V supplies into Switch S1.
If switch S1 is on and fuse F1 is intact, the DC-DC converter PS1 converts the +28V to +5V, +12V and -12V
supplies. Regulator U1 regulates the -12V supply to -10V. Regulator U2 regulates the +5V to +3.3V for powering
the PLD U4.
Connector J6 is used for in-system programming of PLD U4 and should not be utilized by the customer.
Connector J7 is used for test of the CCA and should not be utilized by the customer.
Control lines entering via connectors P1 and P2 are surge protected by transient voltage suppressors (TVS) CR9
though CR28. The +28V supply is protected by TVS CR7. The +5V supply is protected by TVS CR2. The auto-
ground check enable input is transient protected by TVS CR8.
Zener diode CR1 creates a 10V reference to power comparators U43 and U44 for monitoring of the on-board power
supplies. Only the +5V monitor will be discussed further. The 10V reference biases resistors R25, R26, and R29 as
a window into comparator inputs U43A-5 and U43A-6. If the +5V supply into U43A-4 and U43A-7 is within the
window, the U43A-2 and U43A-1 outputs stay high; indicating the +5V supply is OK.
LED CR34 lights when switch S1 is in the ON position and the +3.3V, +5V, +12V and -12V supplies are all within
tolerance, approximately nominal ± 10%. LED CR34 may be tested when off by pressing the lamp test switch on the
LCU CCA.
Power status is also indicated by transistor Q10 into SPI I/O port U40-12 for access by the RMS CCA. Buffers U45
and U37 drive SPI signals to and from SPI I/O port U40, serial EEPROM U38, and optional temperature sensor
U39. Strapping resistors R5, R8, R20, and R21 decode a unique address for SPI I/O Port U40. Logic U36, U41, and
U42 prevent more than one SPI device from transmitting at once.
The SPI I/O Port U40 is reset through diode CR33 and resistor R19 during power-up or when the reset switch is
pressed on the LCU CCA.