User's Manual
Table Of Contents
- GENERAL INFORMATION AND REQUIREMENTS
- INTRODUCTION
- EQUIPMENT DESCRIPTION
- Electronics Cabinet
- Local Control Unit (LCU) (1A1)
- Synthesizer Assembly (1A3A1, 1A3A11)
- Audio Generator CCA (1A3A2, 1A3A9)
- Monitor CCA (1A3A3, 1A3A10)
- Low Voltage Power Supply (LVPS) CCA (1A3A4, 1A3A8)
- Test Generator CCA (1A3A5)
- Remote Monitoring System (RMS) Processor CCA ( 1A3A6)
- Facilities CCA (1A3A7)
- Sideband Amplifier Assembly (1A4A1, 1A4A2, 1A4A6, 1A4A7)
- RF Monitor Assembly (1A4A4)
- Commutator Control CCA (1A4A5)
- Battery Charging Power Supply (BCPS) Assembly (1A5A1, 1A5A2)
- Carrier Power Amplifier Assembly (1A5A3, 1A5A4)
- Interface CCA (1A9)
- AC Power Monitor Assembly (1A6)
- Commutator CCA (1A10, 1A11)
- Portable Maintenance Data Terminal (PMDT)
- Transmitting Antenna System
- Field Monitor Antenna
- Counterpoise
- Equipment Shelter
- Battery Backup Unit (Optional)
- Electronics Cabinet
- EQUIPMENT SPECIFICATION DATA
- EQUIPMENT AND ACCESSORIES SUPPLIED
- OPTIONAL EQUIPMENT
- TECHNICAL DESCRIPTION
- INTRODUCTION
- OPERATING PRINCIPLES
- DVOR TRANSMITTER THEORY OF OPERATION
- Simplified System Block Diagram
- System Block Diagram Theory
- Frequency Synthesizer (1A3A1, 1A3A11)
- Audio Generator CCA (1A7, 1A23) Theory
- Audio Generator CCA Detailed Circuit Theory
- CSB Power Amplifier Assembly (1A5A3, 1A5A4)
- Bi-Directional Coupler (1DC1)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A6, 1A5A7)
- RF Monitor Assembly (1A4A4) Theory
- RF Monitor Assembly Block Diagram Theory
- RMS Processor Block Diagram Theory
- Facilities CCA Theory
- Interface CCA Theory
- Interface CCA Block Diagram Theory
- AC Power Monitor CCA Theory
- Local Control Unit Theory
- Local Control Unit Block Diagram Theory
- DC to DC Converter
- Power Fail Detectors
- Key Switch Registers
- Parallel Interface
- 1.8432MHz Oscillator/Divider Chains
- Positive Alarm Register
- Negative Alarm Register
- 20 Second Delay Counter
- LCU Transfer Control State Machine #1 and #2 and Discrete Controls
- LED Control
- Audible Alarm
- Monitor Alarm Interface
- Station Control Logic
- System Configuration Inputs
- Local Control Unit Block Diagram Theory
- Test Generator (1A3A5) CCA Theory
- Low Voltage Power Supply (1A3A4, 1A3A8) CCA Theory
- Monitor CCA (1A3A3, 1A3A9) Theory
- Power Panel Theory
- Battery Charger Power Supply (BCPS) Theory
- Battery Charger Detailed Circuit Theory
- Extender Board Block Diagram Theory
- Commutator Control CCA Theory
- Commutator CCA (1A10, 1A11) Theory
- PMDT (PORTABLE MAINTENANCE DATA TERMINAL (UNIT 2)
- BATTERIES (UNIT 3)
- FIELD MONITOR KIT (UNIT 4)
- OPERATION
- INTRODUCTION
- REMOTE CONTROL STATUS UNIT (RCSU)
- REMOTE STATUS UNIT (RSU)
- REMOTE STATUS DISPLAY UNIT (RSDU)
- PORTABLE MAINTENANCE DATA TERMINAL (PMDT)
- PMDT SCREENS
- General
- Menus
- System Status at a Glance - Sidebar Status and Control
- Screen Area
- Configuring the PMDT
- Connecting to the VOR
- RMS Screens
- Monitor Screens
- All Monitor Screens
- Monitor 1 & 2 Screens
- Transmitter Data Screens
- Transmitter Configuration Screens
- Transmitter Commands
- Diagnostics Screen
- Controlling the Transmitter via the PMDT
- RMM
- CONTROLS AND INDICATORS
- POWER CONTROL PANEL
- LOCAL CONTROL UNIT (LCU)
- BCPS Asssembly Assembly (1A5A3, 1A5A4)
- Carrier Amplifier Assembly (1A5A3, 1A5A4)
- Monitor CCA (1A3A3, 1A3A10)
- Remote Monitoring System (RMS) CCA
- Facilities CCA (1A3A7)
- Synthesizer CCA (1A3A1, 1A3A11)
- Sideband Generator Assembly (1A4A1, 1A4A2, 1A4A5, 1A4A6)
- Audio Generator CCA (1A3A2, 1A3A9)
- Low Voltage Power Supply (LVPS) CCA (1A3A4,1A3A8)
- Test Generator CCA (1A3A5)
- RF Monitor Assembly (1A4A4)
- STANDARDS AND TOLERANCES
- PERIODIC MAINTENANCE
- MAINTENANCE PROCEDURES
- INTRODUCTION
- PERFORMANCE CHECK PROCEDURES
- Battery Backup Transfer Performance Check
- Carrier Output Power Performance Check
- Carrier Frequency Performance Check
- Monitor 30 Hz and 9960 Hz Modulation Percentage and Deviation Ratio Performance Check
- Modulation Frequency Performance Check
- Antenna VSWR Performance Check
- Automatic Transfer Performance Checks (Dual Equipment only)
- VOR Monitor Performance Check
- Monitor Integrity Test of VOR Monitor (Refer to Section 3.6.8.2.2)
- RSCU Operation Performance Check
- Identification Frequency and Modulation Level Checks
- EQUIPMENT INSPECTION PROCEDURES
- ALIGNMENT PROCEDURES
- Battery Charging Power Supply (BCPS) Alignment Procedures
- Alarm Volume Adjustment Procedure
- RMS Facilities Exterior and Interior Temperature Calibration
- Reassign Main/Standby Transmitters (Dual Systems Only)
- Verification of BITE VSWR Calibration
- Verification of BITE Frequency Counter Calibration
- Verification of BITE Wattmeter Calibration
- RMS Lithium Battery Check Procedure
- Replacing RMS CPU (1A3A6) CCA
- Update of DVOR Software
- Changing the Station Rotation (Azimuth)
- Changing the Monitoring Offsets
- DME Keying Check
- DVOR Frequency Synthesizer Alignment
- DVOR Sideband Amplifier Alignment
- Antenna VSWR Check for New Frequency
- CORRECTIVE MAINTENANCE
- PARTS LIST
- INSTALLATION, INTEGRATION, AND CHECKOUT
- INTRODUCTION
- SITE INFORMATION
- UNPACKING AND REPACKING
- INPUT POWER REQUIREMENT SUMMARY
- INSTALLATION PROCEDURES
- Tools and Test Equipment Required
- Counterpoise and Shelter Foundation Installation
- Shelter Installation
- Counterpoise Installation
- Initial Conditions
- Sideband Antenna Installation
- Carrier Antenna Installation
- Installation of Field Monitor Antenna
- Antenna Cable Exterior Cable Entrance Installation
- Air Conditioner Installation
- Transmitter Cabinet Installation
- Battery Back Up Installation
- DC Voltage and Battery Installation
- AC Voltage Installation
- Connecting DME Keyer Wiring
- RCSU and RMM Connections
- Obstruction Light Installation and Wiring
- Cutting Antenna Cables to Proper Electrical Length
- Tuning the Antennas
- Sideband RF Feed Cables to Commutator Connections
- INSPECTION
- INITIAL STARTUP AND PRELIMINARY TESTING
- Input Voltage Checks
- Installing Modules in Transmitter Cabinet
- Turn on Procedure
- PMDT Hookup and Setup
- Site Adjustments and Configurations
- DVOR Station Power-Up
- Log-On Procedure
- Setting Date and Time
- Setting Station's Descriptor
- Password Change
- Setting System Configuration
- Transmitter Tuning Procedures
- Setting Transmitter Operating Parameters
- Setting Monitor Alarm Limits
- Setting Monitor Az Angle Low Limit
- Setting Monitor Az Angle High Limit
- Setting High Monitor 30 Hz Mod Low Limit
- Setting Monitor 30 Hz Mod High Limit
- Setting Monitor 9960 Hz Mod Low Limit
- Setting Monitor 9960 Hz Mod High Limit
- Setting Monitor 9960 Hz Dev Low Limit
- Setting Monitor 9960 Hz Dev High Limit
- Setting Monitor Field Intensity Low Limit
- Setting Monitor Field Intensity High Limits
- Records
- INSTALLATION VERIFICATION TEST
- SOFTWARE
- TROUBLESHOOTING SUPPORT
Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-9
The output of the carrier phaser is amplified by the carrier buffer amplifier, and feeds the high power carrier
a
mplifier module in the VOR system. In the process of amplitude modulation, the VOR carrier amplifier generates
undesired phase modulation of the output signal. In addition, the transfer phase of the RF amplifier chain will drift
due to temperature. The carrier phaser is used to counter both of these effects. Feedback from the VOR carrier
output signal is routed back to the Frequency Synthesizer module. This feedback is representative of the final RF
carrier output signal, and has both the 30 Hz amplitude modulation, and the undesired phase shift information.
This carrier feedback signal is first passed through a limiter in the Frequency Synthesizer module to remove the 30
Hz AM information. The output of the limiter is applied to a phase detector where it is compared to the direct
output of the carrier PLL synthesizer. The output of this phase detector is a phase error signal, which is amplified
and filtered to drive the carrier phaser. The carrier phaser is modulated to maintain the error voltage at zero volts,
hence countering the undesired phase shift and phase modulation effects of the VOR carrier RF amplifier.
There is a DC offset input to the carrier phase error amplifier that has the effect of shifting the phase of the VOR
carrier output signal with respect to the reference phase in the frequency synthesizer module. This allows for phase
adjustment of the carrier to sideband output RF signals to optimize the signal in space characteristics of the VOR
radiated signal.
The carrier frequency counter divider is also programmed by the SPI interface from the audio generator board. It
provides a fixed divide by 2560 CMOS compatible output for carrier frequency monitoring.
In a DVOR system configuration, the upper and lower sideband frequencies are generated in the synthesizer on the
Sideband 012258 CCA. The 012258 CCA derives the upper and lower sideband signals from the carrier signal
using two quadrature modulators. The modulators use the 9960Hz signals from the Direct Digital Synthesizer
(DDS) on the interface board to mix with the carrier signal. Each sideband signal is generated when the In phase (I)
port of the quadrature modulator is 90 degrees out of phase with respect to the quadrature (Q) port of the quadrature
modulator. The upper sideband is generated when the I-port is +90 degrees with respect to the Q-port. The lower
sideband is generated when the I-port is -90 degrees with respect to the Q-port. This allows the upper and lower
sideband signals to always be 9960 Hz offset from the carrier frequency no matter what channel the VOR system is
transmitting on.
In a CVOR configuration, only the lower sideband path is used. The upper sideband quadrature modulator is
disabled and the lower sideband quadrature modulator is configured to pass only the carrier signal without any
frequency offset. This allows only software programming to determine a CVOR/DVOR system configuration using
the same module.
Both the upper and lower sideband PLL synthesizers have fixed divide by 2560 dividers that operate in the same
fashion as the carrier PLL synthesizer to provide for upper and lower sideband frequency monitoring. In addition,
there are detectors on each of the carrier, upper sideband, and lower sideband signals for power detection and
monitoring of the synthesizer assembly.
The synthesizer assembly also contains phase control circuitry to digitally step the phase in 90 degree increments
referenced from the carrier signal for a coarse phase adjustment. A fine adjustment is made with an analog phaser.
The analog phaser is capable of a minimum of +/- 45 degrees of adjustment range. This allows a total adjustment
range of 360 degrees for the sideband signal referenced to the carrier signal and reduces cable cutting to phase the
VOR system.
2.3.2.1.2
Frequency Synthesizer (1A3A1, 1A3A11) Detailed Circuit Theory
2.3.2.1.2.1 Frequency Reference Circuitry
Refer to Figure 11-12. Oscillator Y1 is a temperature compensated crystal oscillator, or TCXO, which provides a
precision 10.000 MHz CMOS compatible signal at its output. Potentiometer R27 is a trim adjustment for Y1 on the
012262 CCA used to make fine adjustments to output frequency and to compensate for possible crystal aging.