User's Manual

Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-27
The Sideband Generator contains a temperature sensor U56 attached close to the heat sink to monitor the
t
emperature of the heat sink. The RMS has the ability to read the temperature through the SPI interface. The signal
SPI_SCK is the clock used to clock in and out the serial data. The SCK signal is buffered by U43 and U53A. The
SPI_MOSI (master out slave in) line is serial data coming from the RMS. Data on this line enters U53A pin 2 and is
buffered and exits at the Y1output. The signal ~SPI_CSXX is active low when the Sideband Generator board is
being addressed by the RMS. Clock and data information is always present but ignored by the Sideband Generator
when the ~SPI_CSXX is high.
Buffer U53B is used to buffer the SPI_MISO data out of the Sideband Generator to the RMS. The output at Y1 is
tri-stated when the data is a high and active low when the data at the ~OE goes low. This allows for many of the
other modules to use the same SPI_MISO line back to the RMS. Resistor R273, R270,R272, and U54 are used to
decode the addressing of the RMS so that the Sideband Generator responds to the correct ~SPI_CSXX and address.
The circuit U54 provides for parallel input output from the RMS SPI port. This allows for selection of either the
temperature sensor U56 or EEPROM U55. The EEPROM is used to read and write data from the RMS. This
EEPROM holds the Sideband Generator serial number and revision information programmed by the technician
through the PMDT screens.
Phase detector U51 compares a sample of the output of Sideband 1 and Sideband 2 through quadrature hybrids
couplers HY1 and HY2. The two samples are 90 degrees out of phase due to the coupling of the two hybrids.
Therefore when the two outputs of sideband 1 and 2 are in phase then the samples to U51 are 90 degrees out of
phase and the VPHS output is 0.9 VDC. Amplifier U52A subtracts 0.9 Vdc so that when sideband 1 and two are in
phase front panel test point TP6 is at 0 VDC. The technician can adjust the manual phasers in the two sidebands to
make the test point indicate 0 Vdc.
Refer to sheet 6 of Figure 11-21. Gates U48A and U48B are used to enable the sideband generator id the VSWR is
ok and the transmitter is not shut off. Comparator U47B acts as an inverting buffer for the DVOR input. If the
DVOR line is high then the BI_PHASE outputs of U28C and U28D go low and the BI_PHASE modulation for a
CVOR is stopped.
Gate U48C output is high if both phase lock indications are normal. If either or both go low then U47D goes low
discharging C291. Resistor R246 recharges C291 to stretch short time phase lock alarms. Comparator U47C buffers
the output to the Audio Generator for monitoring the phase lock indication.
2.3.2.7
RF Monitor Assembly (1A4A4) Theory
The RF monitor assembly functions as an RF detector/amplifier and distributor of the detected analog RF signals.
The assembly contains a high power dummy load that is capable of dissipating the 100 watts of RF power from the
standby transmitter. There are four additional dummy loads to terminate the output of the standby transmitter
sideband generators into loads. The dummy loads are attached to a heat sink to dissipate the power of the standby
transmitter while it is operating.
2.3.2.8
RF Monitor Assembly Block Diagram Theory
Refer to Figure 2-11. The assembly contains a high power dummy load that is capable of dissipating the 100 watts
of RF power from the standby transmitter. There are four additional dummy loads to terminate the output of the
standby transmitter sideband generators into loads. The dummy loads are attached to a heat sink to dissipate the
power of the standby transmitter while it is operating. There are RF detectors for the forward power and reflected
power for the transmitter connected to the antenna. The transmitter not connected to the antenna is connected to the
internal load. A sample of the terminated power is applied to the standby transmitter detector.
The RF Monitor generates power from the 48 Vdc from either transmitter. When either transmitter is on then the RF
Monitor is powered. A temperature is located on the RF Monitor and the values are read by the RMS processor.
Also data storage is provided on the RF Monitor for the purpose of storing information such as serial number, and
revision data entered using the PMDT. This information travels with the module and holds data particular to that
module.