User's Manual

Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
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Test point TP3 is mounted on the front panel and allows for convenient monitoring of the Standby transmitter
c
omposite signal. Differential driver U19 is used to buffer the output signal to the Monitor and Audio Generator.
Jumpers JP5 and JP6 provide selection of single ended or differential signals to the Monitor and Audio Generator. In
position 1to 2 the signal is single ended. In position 3 to 4 the signal is differential with the output centered about 2.5
Vdc.
Sideband 1 of the standby transmitter enters at connector P2:F and passes through blocking capacitor C1 and into
termination R80. Sideband 2 of the standby transmitter enters at connector P2:D and passes through blocking
capacitor C2 and into termination R82. Sideband 3 of the standby transmitter enters at connector P2:G and passes
through blocking capacitor C3 and into termination R81. Sideband 4 of the standby transmitter enters at connector
P2:E and passes through blocking capacitor C4 and into termination R83.
The forward power RF enters the assembly via RF connector P2:D. This signal originates at directional couple DC1
forward port. A sample of the RF signal applied to the 35 dB attenuator formed by R7, R10 and R11. The signal
then enters the linear detector circuit U1. The detected voltage from U1 is buffered and amplified by U3A.
Potentiometer R1 is located on the front panel of the RF Monitor and allows adjustment of the output level. The
technician uses this adjustment to calibrate the Transmitters>>Data>>Forward Power to the same as measured by
external test equipment while on the antenna.
Test point TP1 is mounted on the front panel and allows for convenient monitoring of the Forward power composite
signal. Differential driver U4 is used to buffer the output signal to the Monitor and Audio Generator. Jumpers JP1
and JP3 provide selection of single ended or differential signals to the Monitor and Audio Generator. In position 1to
2 the signal is single ended. In position 3 to 4 the signal is differential with the output centered about 2.5 Vdc.
The reflected power RF enters the assembly via RF connector P2:E. This signal originates at directional couple
DC1 reflected port. A sample of the RF signal applied to the 13 dB attenuator formed by R6, R8 and R9. The signal
then enters the linear detector circuit U2. The detected voltage from U2 is buffered and amplified by U3B.
Potentiometer R2 is located on the front panel of the RF Monitor and allows adjustment of the output level. The
technician uses this adjustment to calibrate the Transmitters>>Data>>Carrier VSWR.
Test point TP2 is mounted on the front panel and allows for convenient monitoring of the reflected power composite
signal. Differential driver U5 is used to buffer the output signal to the Monitor and Audio Generator. Jumpers JP2
and JP4 provide selection of single ended or differential signals to the Monitor and Audio Generator. In position 1to
2 the signal is single ended. In position 3 to 4 the signal is differential with the output centered about 2.5 Vdc.
The TX1 +48 Vdc and TX2 +48 Vdc signals are applied to fuse F1 through an OR gate circuit consisting of CR2
and CR3. From F1 the voltage is applied to the switching voltage regulator U7. Regulator U7 provides a
rectangular pulse train at the VOUT pin. Indictor L1 and C24 filters the pulse train into a DC voltage. A sample of
the DC voltage is applied to the FB (feedback) pin of U7 which allows correction of the pulse train pulse width to
provide +5 VDC at the output. Diode CR11 along with R48, C20 and Q1 provide over voltage protection. If the
voltage exceeds 5.6 volts then Q1 is turned on which will blow the fuse F1.
Linear regulator circuit U12 provides regulation of the +5 Vdc to +3.3 Vdc. Resistors R36, R37 and diode CR4
provide a precise +10Vdc source for the voltage monitor circuits. Voltage comparators U6A and U6B monitor the 5
Vdc supply and if the voltage exceeds the range 4.5 to 5.5 Vdc then one of the comparator outputs will go low
turning off both Q2 and Q3. FET Q2 provides an output to the Facilities CCA that is low when the power is ok and
high when the power is out of tolerance. FET Q3 control the front panel power OK LED. When power is normal the
gate of Q3 is high and the drain is low turning the LED CR7 on. The lamp test input (~TEST) goes low when the
switch on the LCU is depressed and causes the LED CR7 to go on.