User's Manual

Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2-37
The tip and ring signals from dedicated modem U14 are isolated, TVS-protected, and filtered by T1, CR8, FL4, and
F
L5 before exiting connector P2-A14 and P2-A15. Audio from U14-64 is scaled by R28 and R30 before audio
header JP1-3. Three more sources of audio (other than the modems) are controlled by analog multiplexer U16.
MON1_AUDIO_ID and MON2_AUDIO_ID from P1-C1 and P1-C2 (originally from the Monitor CCAs) connect to
multiplexer U16-15 and U16-12. The third audio source is generated by 1KHz oscillator CR34, U17:A, C65, and
R62 when the ~TEST signal is active. ID_MUX0 and ID_MUX1 (U16-11 and U16-10) select monitor audio
through U16 except when ~TEST is active.
Resistors R39 and R38 scale the monitor or test audio output of U16-3 and feed it to AC-coupling capacitor C30.
Amplifier U15 amplifies the sum of audio presented through R32, R33, and R34 and drives speaker SPK1 as
determined by gain resistor R37. Amplifier U15 (and therefore all audio) is disabled if no jumper is present between
audio header JP1-5 and JP1-6. Each modem’s audio output can be disabled by either removing jumpers between
audio header JP1-1 and JP1-2 or JP1-3 and JP1-4.
The exterior and interior temperature circuitry operates identically. Therefore only the exterior shall be discussed.
The exterior temperature sensor signal (EXTERIOR_TEMP) from P1-A21 is converted from current to voltage by
R41 and R43 before routing to buffer U19-3. The U19-1 buffered output (EXT_TEMP) is scaled by resistor network
RN14-5/12 and RN14-6/11 before connection to the J1 test header and analog multiplexer U21-26 as
ETMP_SCALED.
Test header J1 is used for factory testing only.
All on-board power supplies are scaled and presented to both the J1 test header and analog multiplexers U20 and
U21. These supplies are DVCC (+3.3V), +5DIG, +12DIG, +12ANA, -12DIG, -12ANA, +15V, -15V, +24V,
1_+48V, and 2_+48V and are scaled by resistor networks RN14, RN4, RN5, RN1, and RN2. Other signals routed to
the analog multiplexers are SPARE_ANA1 through SPARE_ANA10, SPARE_DIN1 through SPARE_DIN4,
+5Vref created by U30, digital ground, and analog ground.
An individual channel of the 32 possible channels for the U20/U21 analog multiplexer pair is selected by MUX0
through MUX4 from latch U22. Inverter U17:B insures MUX4 enables only U20 or U21. The enabled U20 or U21
multiplexer passes its signal to buffer U25-3. Buffer output U25-6 passes the signal to A-D converter U26-14.
The U26 A-D converts the analog input signal to digital data outputs when commanded by latch U22-15. The end-
of-conversion is signaled by U26-28; which is read through buffer U31-9. The digital data outputs of the A-D are
pulled-up by RN6 and buffered through U27 to the data bus.
The system configuration switch signals (SCON0 through SCON15) enter via connector P1, are pulled-up by
resistor networks RN7 and RN8, and then connect to buffers U28 and U29. Channel select inputs CSEL0 through
CSEL7 enter via connector P1, are pulled-up by resistor network RN11, and are buffered to the data bus by U18.
Power OK signals from the Sideband Amplifiers, Carrier Amplifiers, BCPS CCAs, and RF Monitor as well as status
signals INTERLOCK and ~FANS_OK connect to buffers U31 and U32 and resistor networks RN9 and RN10.
Resistors R16 and R26 provide a high current pull-up for SMOKE_DETECTOR and INTRUSION_SENSOR
signals before buffer U32.
Latch U23 drives SPARE_DOU1 through SPARE_DOUT4 through buffer U24 to connector P1. Latch U23-12
drives the FANS_ON signal through inverter U17:C and transistor Q2 to connector P2-B16 while CR42 provides
transient protection. Finally, latch U23 controls audio multiplexer U16 via ID_MUX0 and ID_MUX1 (discussed
previously).
NOTE
TACAN interfaces are described but not used in the VOR system. The Interface CCA is also
used in DME/TACAN systems and common to the VOR product.