User's Manual

Model 1150A DVOR
2-44 Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
2.3.2.14.1.5 1.8432MHz Oscillator/Divider Chains
The LCU employs a 1.8432MHz crystal oscillator to produce all frequencies required by the design. The frequency
is divided by 512 to produce 3600Hz used to produce the audible alarm tone and the Transmit On clocks driven
back to the monitors. The signal is further divided by 8 to produce 450Hz used as the system clock within the
design. This signal is divided by 45 to produce 10Hz used in the 20 second delay counter and the Key De-bounce
circuits.
Figure 2-17 LCU Block Diagram
2.3.2.14.1.6
Positive Alarm Register
This register receives the positive (high True) alarms from the two monitors within a system. Depending on the
configuration of the alarm voting and bypass logic, the Alarm Register will report an alarm to the transfer state
machines if reported by the enabled monitors.
2.3.2.14.1.7
Negative Alarm Register
This register receives the negative (low True) alarms from the two potential monitors within a system. Depending
on the configuration of the alarm voting and bypass logic, the Alarm Register will report an alarm to the transfer
state machines if reported by the enabled monitors.
2.3.2.14.1.8
20 Second Delay Counter
The 20 second delay counter is activated whenever the system initially powers up or a transmitter has been shut
down without transferring to a standby system to ensure that the system will not radiate any signal for a period of 20
seconds following the shutdown.