User's Manual

Model 1150A DVOR
Rev. - November, 2008
This document contains proprietary information and such information may not be disclosed
to others for any purposes without written permission from SELEX Sistemi Integrati Inc.
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The signal is routed into the receiver section of the monitor CCA. The signal passes through a selectable 16 dB
a
ttenuator on the monitor board. At high signal levels the 16 dB attenuator is switched into the circuit otherwise it is
switched out. The user enables this attenuation using the PMDT configuration settings.
The signal then passes through a pre-selector band pass filter that rejects high input level radar and communication
band signals. The signal then is amplified by a fixed gain amplifier. The signal then enters mixer MX1 and is mixed
by the output of the frequency synthesizer described later. The output is at 45 MHz and is the intermediate
frequency signal (IF).
The 45 MHz IF signal then enters the crystal filter which provides a 3 dB bandwidth of 30 kHz. The rejection of the
adjacent channel 50 kHz away is greater than 50 dB. The signal then enters a digitally controlled step attenuator that
is operator set during installation from the PMDT.
The signal then enters a second mixer that results in a 125 kHz second IF signal. This signal is then sampled by an
analog to digital converter. There are two DSP processors the master and the slave. The slave DSP filters the signal
and provides a base band audio signal in digital format to the master DSP processor. The Master DSP then digitally
processes the signal to generate the individual parameters of the VOR signal.
The Monitor CCA performs supervision of critical VOR system parameters and also performs self-monitoring. The
VOR Monitor Certification checks are performed continuously in the background. The current status of the
background test may be checked by selecting Monitor 1 (or 2) >> Test Results >> In Process.
The RMS performs the following tests for each parameter using the test generator. Failure of the test three times will
cause the RMS to disable the monitor.
1. The parameter is 10% below the lower alarm limit. The monitor must return an alarm indication for this
parameter.
2. The parameter is set 10% above the lower alarm limit. The monitor must return a normal indication.
3. The parameter is 10% below the upper alarm limit. The monitor must return a normal indication for this
parameter.
4. The parameter is set 10% above the upper alarm limit. The monitor must return an alarm indication.
The Monitor CCA receives battery-backed DC power from the Low Voltage power supply (LVPS) at connector P2.
Regulated +5V, +12Vand -12V supplies are provided from the LVPS for use by the Monitor CCA to power the
microcontroller and all of its associated circuitry. Linear voltage regulators generate -5 VDC and +3.3 VDC for use
on the circuit card.