User's Manual

PARANI-BCD110
Page 17 of 26
BCD110 has three general purpose analogue interface pins, AIO_0 and AIO_1. These are used to access
internal circuitry and control signals. One pin is allocated to decoupling for the on-chip band gap reference
voltage, the other two may be configured to provide additional functionality.
4.6 Reset Interface
BCD110 may be reset from several sources: RESETB pin, power on reset, a UART break character or via a
software configured watchdog timer.
The RESETB pin is an active low reset and is internally filtered using the internal low frequency clock
oscillator. A reset will be performed between 1.5 and 4.0ms following RESETB being active. It is
recommended that RESETB be applied for a period greater than 5ms.
The power on reset occurs when the VDD_CORE supply falls below typically 1.5V and is released
when VDD_CORE rises above typically 1.6V.
At reset the digital I/O pins are set to inputs for bi-directional pins and outputs are tri-state. The
PIOs have weak pull-downs.