Data Sheet
Table Of Contents
- Datasheet
- Preface
- About this Datasheet
- Product Features
- Regulatory Approval
- Physical Characteristics
- 3.1 ECCN and Part Number
- 3.2 Electrical Operating Conditions
- 3.3 Environmental Operating Conditions
- 3.4 Power Supply Dimensioning
- 3.5 I/O Characteristics
- 3.6 Auxiliary ADC
- 3.7 Performance
- 3.8 Component Reliability
- 3.9 Package Description
- 3.10 Packing Information
- 3.11 Storage Conditions
- 3.12 Mounting Considerations
- Signal and Pins
- Acronyms
SIGNAL AND PINS
LTE LOW POWER MODE
29 PROPRIETARY GM01Q DATASHEET
SEQUANS Communications
• Behavior in PS-PM.
Note: The PMU bi-directional wake IOs output buffer is disabled in
PS-PM.
Figure 4-7 shows a simplified diagram of the PMU bi-directional wake IOs
in PS-PM.
Figure 4-7: PMU Wake IOs in PS-PM Mode
In PS-PM, all PMU bi-directional wake IOs are high impedance with ultra
low leakage current. This corresponds to a minimum impedance of
180 MOhm at the maximum input supply voltage of 3.6 V.
If an event is presented on the wake IO pad and this wake IO has been
configured to be sensitive on that event, this will take the system back to
Active mode.