User's Manual

1. Select RX by setting the PRIM_RX bit in the CONFIG register to high. All data pipes that receive
data must be enabled (EN_RXADDR register), enable auto acknowledgement for all pipes running
Enhanced ShockBurst™ (EN_AA register), and set the correct payload widths (RX_PW_Px registers).
Set up addresses as described in item 2 in the Enhanced ShockBurst transmitting payload above.
2. Start Active RX mode by setting CE high.
3. After 130μs nRF24L01+ monitors the air for incoming communication.
4. When a valid packet is received (matching address and correct CRC), the payload is stored in the
RX-FIFO, and the RX_DR bit in STATUS register is set high. The IRQ pin is active when RX_DR is
high. RX_P_NO in STATUS register indicates what data pipe the payload has been received in.
5. If auto acknowledgement is enabled, an ACK packet is transmitted back, unless the NO_ACK bit
is set in the received packet. If there is a payload in the TX_PLD FIFO, this payload is added to
the ACK packet.
6. MCU sets the CE pin low to enter standby-I mode (low current mode).
7. MCU can clock out the payload data at a suitable rate through the SPI.
8. nRF24L01+ is now ready for entering TX or RX mode or power down mode.

TXmode
TheTXmodeisanactivemodefortransmittingpackets.Toenterthismode,thenRF24L01+musthave
thePWR_UPbitsethigh,PRIM_RXbitsetlow,apayloadintheTXFIFOandahighpulseontheCEfor
morethan10μs.ThenRF24L01+stays
inTXmodeuntilitfinishestransmittingapacket.IfCE=0,
nRF24L01+returnstostandby‐Imode.IfCE=1,thestatusoftheTXFIFOdeterminesthenextaction.If
theTXFIFOisnotemptythenRF24L01+remainsinTXmodeandtransmitsthenext
packet.IftheTX
FIFOisemptythenRF24L01+goesintostandby‐IImode.ThenRF24L01+transmitterPLLoperatesin
openloopwheninTXmode.ItisimportantnevertokeepthenRF24L01+inTXmodeformorethan4ms
atatime.IftheEnhancedShockBurstfeaturesareenabled,
nRF24L01+isneverinTXmodelongerthan
4ms.

Enhanced
ShockBurst transmitting payload
1. Set the configuration bit PRIM_RX low.
2. When the application MCU has data to transmit, clock the address for the receiving node
(TX_ADDR) and payload data (TX_PLD) into nRF24L01+ through the SPI. The width of TX-payload
is counted from the number of bytes written into the TX FIFO from the MCU. TX_PLD must
be written continuously while holding CSN low. TX_ADDR does not have to be rewritten if it is
unchanged from last transmit. If the PTX device shall receive acknowledge, configure data pipe 0
to receive the ACK packet. The RX address for data pipe 0 (RX_ADDR_P0) must be equal to the
TX address (TX_ADDR) in the PTX device.
3. A high pulse on CE starts the transmission. The minimum pulse width on CE is 10μs.
4. nRF24L01+ ShockBurst:
 Radio is powered up.