Technical data

About the SGI 2400 and 2800
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The CrayLink Interconnect links modules to one another. The CrayLink Interconnect
may appear to be a type of super data bus, but it differs from a bus in several important
ways. A bus is a resource that can only be used by one processor at a time. The CrayLink
Interconnect is a mesh of multiple, simultaneous, dynamically allocatable connections
that are made from processor to processor as they are needed. This web of connections
differs from a bus in the same way that multiple dimensions differ from a single
dimension: if a bus is a one-dimensional line, then the CrayLink Interconnect is a
multidimensional mesh.
The SGI 2400 and 2800 servers are highly scalable - the SGI 2400 server can range in size
from 2 to 32 processors while the SGI 2800 goes from 34 to 128 processors. As you add
modules, you add to and scale the system bandwidth. These servers are also modular, in
that they can be increased in size by adding standard modules to the CrayLink
Interconnect.
The SGI 2400 and 2800 architecture achieves this scalable processing power primarily by
using the following technology:
CrayLink Interconnect
XIO slots
Distributed shared memory
new IRIX operating system
CrayLink Interconnect
The SGI 2400 and 2800 modules are connected by the CrayLink Interconnect (also known
as the interconnection fabric). The CrayLink Interconnect is a set of switches, called
routers, that are linked by cables in various configurations, or topologies. Here are some
key features that define the server’s interconnection fabric:
The CrayLink Interconnect is a mesh of multiple point-to-point links connected by
the routing switches. These links and switches allow multiple transactions to occur
simultaneously. The interconnect is not limited by contention
The links permit extremely fast switching (a peak rate of 1600 MB/sec
bidirectionally, 1600 MB/sec in each direction).
The CrayLink Interconnect does not require arbitration.
More routers and links are added as nodes are added, increasing the CrayLink
Interconnect’s bandwidth.