Technical data

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Chapter 1: Introducing the SGI 2400 and 2800 Server Systems
The CrayLink Interconnect provides a minimum of two separate paths to every pair of
SGI 2400 or 2800 modules. This redundancy allows the system to bypass failed routers
or broken fabric links. Each fabric link is additionally protected by a CRC code and a
link-level protocol, which retry any corrupted transmissions and provide fault tolerance
for transient errors.
XIO Slots
The XIO cardcage allows you to install additional I/O type boards (such as ultra-SCSI,
fibre channel, FDDI, and graphics interface) into the SGI 2400 or 2800 chassis. In addition,
an optional PCI carrier assembly allows users to install up to three PCI boards into each
SGI 2400 or 2800 base module. XIO uses the same physical link technology as the
CrayLink Interconnect, but uses a protocol optimized for I/O traffic.
The XIO features are:
• high bandwidth—1600 MB/sec (peak)
• concurrent transfers
• real-time performance
• future expandability
Distributed Shared Address Space (Memory and I/O)
The SGI 2400 and 2800 employ a distributed shared memory system architecture where
main memory is split among the Node boards. Rather than appearing as one fast
memory, main memory is “distributed” over the configuration, with a little piece of the
memory near each processor. Thus the name “distributed shared memory.” A directory
memory keeps track of information necessary for hardware coherency and protection.
This differs from previous-generation SGI systems, in which memory is centrally located
on and only accessible over a single shared bus. By distributing the SGI 2400 and 2800
memory among processors, memory latency is reduced. Accessing memory near a
processor takes less time than accessing remote memory. Although physically
distributed, all of main memory is available to all processors.