Technical data

Major Components
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Premium Directory Memory
The optional premium directory DIMMs are required only for configurations with more
than 16 Node boards. These directory memory DIMMs maintain cache coherence in large
system configurations. Cache coherence helps provide data consistency when multiple
processors need to access the same piece of memory.
Hub
The Hub ASIC on the Node board is the primary communication link between the 64-bit
processor, the I/O subsystem, the main memory, and the CrayLink Interconnect. The
Hub also interfaces with directory memory, which is responsible for maintaining cache
coherence.
Status LEDs
Figure 2-8 shows the bulkhead on the front of the Node board. The LEDs provide status
information for the individual boards.