User's Manual

E
hon
g
T
6.8.
The au
d
SPL.
W
betwee
shown
6.9.
The ou
t
variabl
e
output
c
The ou
t
is avail
a
Figure
1
T
echnolo
gy
C
o
Microp
h
d
io input is
W
ith biasing
n about –4
0
in Figure 1
4
Analog
t
put stage
d
e
sampling
f
c
ircuitry.
t
put stage
c
a
ble as a di
1
4 shows,
a
o
., Ltd 
Figure 1
2
h
one inp
u
Figure 1
3
intended f
o
resistors R
0
dBV and
–
4
.
Output
s
d
igital circui
t
f
requency t
c
ircuit is co
m
fferential si
g
a
nd betwe
e
2
: Example
u
t
3
: Microph
o
o
r use in th
e
1 and R2 e
q
–
60dBV. Th
s
tage
t
ry convert
s
o a 2Mbits/
s
m
prised a
D
g
nal betwe
e
n SPKL_R
N
Circuit for
S
o
ne Biasin
g
e
range fro
m
q
ual to 1k

e microph
o
s
the signal
s
5-bit mult
i
D
AC with ga
e
n SPKR
_L
N
and SPK
L
S
PDIF Inter
f
(
Sin
g
le Ch
a
m
1A @ 9
4

, this requi
r
o
ne for eac
h
from 16-bi
t
i
-bit bit stre
a
in setting a
n
L
N and SP
K
L
_RP for th
e
B
f
ace
(
Optic
a
a
nnel Show
n
4
dB SPL to
r
es microp
h
h
channel s
h
t
per sampl
e
a
m, which i
s
n
d class
AB
K
R_LP for t
h
e
left chan
n
B
luetooth Au
d
a
l
)
n)
about 10
A
h
ones with
s
h
ould be bi
a
e
, linear P
C
s
fed into t
h
B
amplifier.
h
e right ch
a
n
el.
d
io Module
A
@ 94dB
s
ensitivity
a
sed as
C
M of
h
e analogu
e
The output
a
nnel, as
e