Service manual

DV-L70S
DV-L70BL
DV-L70W
40
56 VSS – Digital GND
57 VDD – Digital power +3.3V
58 PXDI (4) Input
59 PXDI (5) Input
60 PXDI (6) Input
61 PXDI (7) Input
62 TEST0 Input Test terminal
63 TEST1 Input Test terminal
64 VSS – Digital GND
Terminal
Terminal name In/Output Function
• Block Diagram
12
HADAT
PXDI
HSYNCI
HADR HCS HAS HWR HRD HIM MRST
VDD
VSS
TEST0
TEST1
INT
WAIT
PXDOVSYNCOHSYNCO
PXCLKI
VSYNCI
PXCLKO
64pin LQFP
18
8
8
81
1
1
111 11
15
10 11
27
21 29 28 27 26 30 31
19
8
17
16
25
24 32
33
41
40 48
49 57
56 64
62
63
22
23
3934
43
4546
42
44
51
47
50
55 61
52 58
CPU
Host interface
ITU-R
601/656
interface
ITU-R
601/656
formatter
Timing
generation
Clock
Gen.
Source
Dec.
NTSC Enc.
(3ch D/A built in)
Edge
creation
SPT circuit
Digital
dinamic
r circuit
Digital color correction
Color
offset
correction
White
correction
DR-SPT
circuit
8
11
1
1
Pin No. Terminal name I/O Operation function
1 -IN I Error amplifier inversion input terminal
2 SCP – Capacitor connection terminal for soft start/SCP setting
3 VCC – Power terminal
4 BR/CTL I Output current setting/control terminal
5 OUT O Totem pole type output terminal
6 GND – Ground terminal
7 OSC – Capacitor/resistor connection terminal for oscillation frequency setting
8 FB O Error amplifier output terminal
9-16. IC1000 MB3800PV
• Block Diagram
Soft start
S. C. P
-
+
-
+
+
+
6
8
1
3 7
2 4
5
OSCVcc
OUT
30k
0.3V
DTC0.6V
PWM
Comp.
0.1V
36k
500
Error Amp.
0.5V
GND SCP BR/CTL
FB
-IN
1.25V
0.6V
0.1V
A source of
reference voltage
Sawtooth
oscillator
Output drive
control circuit