Service manual

DV-L70S
DV-L70BL
DV-L70W
48
11-23. IC3201 MB8346BV
12 bits shift register
Address decoder
D0
DI
GND
DO
LD
CLK
D1 D2 D3 D4 D5 D6 D7 D8
1234 12
12
12
8 bits latch8 bits latch
DO
D9 D10 D11
Vcc
8 bits
R-2R
D/A Converter
DIDO DI
Vcc
+
-
GND
AO
1
AO12 VDD Vss
8
8 bits
R-2R
D/A Converter
+
-
• Block Diagram
Pin No. I/O Terminal name Remarks
17 I Data input terminal The 12-bit serial data is input.
14 O Data output terminal The bit data of MSB of 12-bit shift register is output.
16 I Shift clock input terminal The input signal form the DI terminal is input into 12-bit shift register when the shift
clock reises.
15 I Load signal input terminal When “H” level is input, the data of the 12-bit shift register is loaded to the decoder
and register for D/A output.
18, O D/A output teminal Analog data of 8-bit D/A converter with OP amplifier is output.
19,
2,
3,
4,
5,
6,
7,
8,
9,
12,
13
11 – Power terminal Power terminal of MCU interface/OP amplifier
20 – GND terminal Ground terminal of MCU interface/OP amplifier
10 – Power terminal Power terminal of D/A converter
1 – GND terminal Ground terminal of D/A converter