Service manual

DV-L70U
9-2. IC303 IX1517GE RF SIGNAL PROCESSOR
Pin No. Terminal name I/O Operation function Terminal DC Voltage(TYP.) Remarks
1 GND – GND terminal. –
2 P2TP I TE+input (CD) VrA
3 P2TN I TE–input (CD) VrA
4 LDO2 O Drive ouput –
5 MDI2 I Monitor input –
6 VrA O Analog VREF 2.1[V]
7 VrD O Digital VREF – Vdd 1/2
8 Vdd I Power terminal 4.2V (3.3V)
9 DPAC – DPD AC combination capacity 1 –
10 DPBD – DPD AC combination capacity 2 –
11 DPD1 – DPD integral capacity 1 –
12 DPD2 – DPD integral capacity 2 –
13 SCB I Control line (Bit clock) 2.2[V]
14 SCL I Control line (Latch signal) 2.2[V]
15 SCD I Control line (Sirial Data) 2.2[V]
16 VRCK I Reference clock input 2.3[V] When frequency is increased, the
filters excepting the servo LPF are
shifted to high frequency side.
17 VCKF – Capacity for time constant adjustment –
18 VccP – Power terminal –
19 LVL O Servo addition output Vrd x (1/2)
20 TEO O TE output VrD
21 FEO O FE output VrD
22 DFTN I DPD difect – Low DPD output: Mute
23 VccS – Power terminal (servo) –
24 RPZ O RF ripple center voltage VrD
25 RPO O RF ripple output VrD
26 RPB O RF ripple bottom –
27 RPP O RF ripple peak –
28 RFO O Equalizing RF output 2.3[V]
29 NC – NC terminal – To be connected to GND
30 NC – NC terminal – To be connected to GND
31 VccR – Power terminal (RF) –
32 DPDB I Pit depth adjustment VrD When D PDB is raised, the A/B
side delay increases.
33 TEB I TE balance VrD When TEB is raised, the TP side
gain increases and the A+C side
delay increases.
34 FEB I FE balance VrD When FEB is raised, the A+C (FP)
side gain increases.
35 PSC I VRCK frequency division ON/OFF – High: Frequency division OFF
36 Vcc2 – Power terminal –
37 NC – NC terminal VrD To be connected to VrD, or to GND
through C
38 EQD I Group delay correction VrD When EQD is raised, the group
delay increases at the right side.
39 GND2 – GND terminal. –
40 RFDC – DC feedback capacity –
41 RFA O RF total addition output 2.2[V]
42 EQB I Boost adjustment VrD When EQB is raised, the boost increases.
43 EQF I Frequency adjustment VrD When EQF is raised, shift to the
high frequency side occurs.
44 MDI1 I Monitor input –
45 LDO1 O Drive output –
46 P1TN I TE–input (DVD) VrA
47 P1TP I TE+input (DVD) VrA
48 NC – NC terminal – To be connected to GND
49 P1FN I FE–input (DVD) VrA
50 P1FP I FE+input (DVD) VrA
51 LDP1 I APC polarity 1 – Positive polarity when this terminal
is connected to Vcc.
52 P1DI I D input (DVD)
9-2