SERVICE MANUAL MODEL ER-A770 (For "U"&"A" version) CONTENTS CHAPTER 1. SPECIFICATIONS ................................................................1 - 1 CHAPTER 2. OPTIONS ..............................................................................2 - 1 CHAPTER 3. SERVICE PRECAUTION ......................................................3 - 1 CHAPTER 4. SRV RESET (Program Loop Reset) and switch to SRV mode...4 - 1 CHAPTER 5. MASTER RESET .............................................................
CHAPTER 1. SPECIFICATION 1. Apearance 3. Keyboard External view 1) Standard keyboard layout Front view Operator display 91 92 93 94 95 96 97 82 83 84 85 86 87 88 73 64 55 Keyboard 46 38 Power switch Insure that the power switch is placed in the OFF position prior to connecting AC power.
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - KEY TOP BT SEAT# PAGE UP, PAGE DOWN , , , CANCEL DESCRIPITON Bill totals/Bill transfer key (CHECK-ADD) Seat number entry key Page up/down keys Cursor (up/down/right/left arrow) keys Cancel key Optional key top KEY TOP 000 98 ~ 135 1 ~ 50 %2 ~ %9 2~ 9 CH1 ~ CH8
• Screen example 2 (PGM mode) 4) Blank key sheet layout Time Mode name Window In the PGM mode, programmable items are listed. 3. Display Double-size character mode indicator (W): Appears when the double-size character mode is selected during text programming. 1) Operator display • Screen example 1 (REG mode) Caps lock indicator (A/a): The upper-case letter “A” appears when Caps Lock is on, and the lower-case letter “a” appears when Caps Lock is off during text programming.
Pole Display
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 2. Sales Options No.
. How to use service tools 7-1. Expansion PWB : CKOG-6724BHZZ • Connection diagram • External view ER-A7RS ER-A770 bus connector • Plain view Test pins : Used to check the bus signals. Bus connector : Used to check the bus signals. 7-2. MCR test card: UKOG-6718RCZZ • Used when executing the diagnostics of the UP-E12MR. • External view Connected to the ER-A770 Mother PWB.
CHAPTER 3. SERVICE PRECAUTION 1. Adjustment for SRN (IN-LINE) interface circuit If transistor Q9 in the transmitter/receiver section has been replaced or if the SRN level requires readjustment, the following alignment is required: Waveform adjustment Adjust VR1 until the signal waveform as shown in Fig. 4 is obtained across TP1 and TP2 (GND). Turning VR1 clockwise extends the interval of T1. VOH VOL T1 1) Tools and Instruments Required T2 T1=580 to 620ms T2=380 to 420ms Oscilloscope (50MHz or better) .
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 3) IPL from P-ROM via ER-A7RS 3. ER-A770 Utility tools (1) Install the two master ROMs to the IC socket (IC12 , IC13) on the ER-A7RS. 1.
No Procedure on P.C. side 7 Execute "POSUTILITUTOOL.EXE" on P.C. *Don’t execute the other Software at the same time. 8 Select the ROM object Files by "Add Files.." button. 9 Push "SEND" button. Program data is sent to ER-A770 automatically. No 9 Procedure on ER-A770 side Program data is received from P.C. automatically. ER-A770 shows IPL from IR Connected 115200 21 22 23 24 25 26 27 28 10 When sending is completed, the initial Window is shown after "Complete" window.
3.2 02FD No 1 2 Procedure on P.C. side Install "02FD.EXE" on the P.C. ALL RAM Data UpLoad : Go to "2" ALL RAM Data DownLoad : Go to "9" ALL RAM Data UpLoad Connect P.C. and ER-A770 (CH2) via RS232. (Fig 1) No 2 3 Procedure on ER-A770 side Enter the SRV mode. Select " 2 SETTING ". Select " 14 BACKUP SEND" ER-A770 shows BACKUP SEND SEND DATA ALL RAM SPEED 4 Execute "02FD.EXE" on P.C. *Don’t execute the other Software at the same time. 5 Set the Communication method by "Setting" Button.
No 11 Procedure on P.C. side Execute "02FD.EXE" on P.C. *Don’t execute the other Software at the same time. 12 Set the Communication method by "Setting" Button. 13 14 Push "OK" Button. Push "Transmit Start" Button. And Select the Sending File. Communication starts. No 14 Procedure on ER-A770 side ER-A770 shows RECEIVING 15 DownLoad is completed. The initial Window is shown. Push "Exit" Button. 4. Note for handling of LCD • The LCD elements are made of glass.
CHAPTER4. SRV RESET (Program Loop Reset) and switch to SRV mode In the ER-A770, the following reset switch (location No. : SW1) is used to switch to the service (SRV) mode and to reset. SRV. reset Used to return the machine back to its operation state after a lock up has occurred. PROCEDURE 1) Turn off the AC switch. 2) Set the reset switch to "ON" position 3) Turn on the AC switch. (Wait one second) 4) Turn to "OFF" the reset switch. 5) The SRV mode is displayed as shown below.
CHAPTER 5. MASTER RESET (All Memory Clear) There are three possible methods to perform a master reset. c a b d MRS-1 (Master resetting 1) Used to clear all memory contents and return machine back to its initial settings. Return keyboard back to default for default kyeboard layout. PROCEDURE 1) Turn off the AC switch. 2) Set the reset switch to "ON" position 3) Turn on the AC switch. (Wait one second) 4) While holding down the MRS-1 key , turn to "OFF" the reset switch.
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - NOTES: 2) Set the reset switch to "ON" position 1: When the 0 key is pressed, the key of the key number on display is disabled. 3) Turn on the AC switch. (Wait one second) 4) While holding down the MRS-2 key , turn to "OFF" the reset switch.
7) Set the fixed keys in the table below. (Start from the zero "0" key, The keys are displayed sequentially.) PROCEDURE 1) Turn off the AC switch. DISPLAY: 2) Set the resetswitch to "ON" position. ENTER 0 3) Turn on the AC switch. (Wait one second) 4) While holding down MRS-3 key , turn to "OFF" the reset switch. MRS-3 key: The key located on Left lower corner of the keyboard.
CHAPTER 6. DIAGNOSTICS SPECIFICATIONS CONTENTS 1. General 1. General ........................................................................................ 1 2. System configuration ................................................................... 1 2-1. Test system ....................................................................... 1 This diagnostics program is used as a simplified check of the ERA770 series operations in servicing. The diagnostics program is built in the standard ROM. 3.
ER-A770 Diagnostics V 1.
Check point address = 800000H,800001H 800002H,800004H 800008H,800010H 800020H,800040H 800080H,800100H 800200H,800400H 800800H,801000H 802000H,804000H 808000H,810000H 820000H,840000H 880000H,900000H Display The screen displays the capacity of RAM in the unit of 64 KB. UP-P02MB2 Check each block becomes 01H, and the total of 2MByte is 20H. The program version of the IPL is displayed so that 0PAGE (BLOCK) where the IPL is stored is individually controlled.
3) SSP Check 3-5. RS232 I/F Diagnostics Check content By starting this check program, the SSP setting for checking is automatically performed and the SSP check is executed and the result is displayed. The SSP check sets data for check in the vacant space in the SSP entry register, and deletes the data for check after completion of checking. Therefore, the already set data are not changed by this check. Display The main PWB and the option PWB (RS232 interface of ER-A7RS) are checked.
The above check is repeated four cycles. RS232 I/F Diagnostics CHANNEL Check CH1 = exist! CH2 = exist! CH3 = none! CH4 = none! CH5 = none! CH6 = none! CH7 = none! • Data transfer check The loop back data (256 bytes) of 00H ~ 0FFH are used for data transfer check. The baud rate is set to 38400BPS. ← Display when channel present • Timer check (RS232 on board timer) ← Display when no channel Before performing the check, set the timer to RCVDT start and 5ms. Then perform the following procedure.
Terminating procedure 7) CH6 Check Check content Press the CANCEL key to terminate the check. The check procedure, the display, and the terminating procedure are the same as CH1 Check. 8) CH7 Check The ER-A770 LCD display is checked. Check content The check procedure, the display, and the terminating procedure are the same as CH1 Check. 9) CH8 Check Check content Check content • Control signal check RSn OFF ON OFF ON The test program displays the patterns in the following sequence.
• Reversed pattern of the above display. 3-8. SHARP Retail Network Diagnostics The SRN test is performed. To perform this test, the following composition is required. • The outermost peripheral of the LCD’s active area is displayed in one-dot line. • ER-A770 • Terminal resistor • Branch (trunk) cable (only for data transfer test) The following menu is displayed. The cursor position is highlighted. Use key and key to move the cursor. Move the cursor to the process you desire and press the enter key.
b0 An interruption of send complete cannot be made. (DMAC TC UP interruption) • Execute diagnostics command 5. The error status is displayed. The names and the directions of the signals which are subject to diagnostics 5 command are as shown in the table below. Signal name perform the service reset. 2) SRN Flag Send Check Check content Execute diagnostics 3 command to send Flag (7EH) continuously.
• Master machine setting • The master machine receives the data, and checks the sequence No. and 256byte AAH data. In case of an error, the master machine displays an error code and terminates the check. If two or more satellite machines are used, the above operation is repeated. If data transmission with all the satellite machines are normally completed, the master machine incre ments the sequence No. The above operation is repeated. In the menu screen, select "Data Transmission Check (Master Machine).
3-9. Magnetic Card Reader Diagnostics 2) Drawer 2 Check Read check of the optional UP-E12MR is performed. Check content The test program reads the magnetic card of ISO 7811/1-5 standard and displays the data. When the CANCEL key is pressed, the display returns to the diagnostics menu. The solenoid of drawer 2 is turned on, and the drawer open sensor value is sensed at every 100ms, and the state is displayed.
CHAPTER 7. CIRCUIT DESCRIPTION 1. Hardware block diagram Drawer X 2 Driver CPU FLASH ROM +20V H8/510 2MB RAM Connector MCR G.A. Option Display SO-DIMM 72pin MPCA8 PSEUDO SRAM lsp2032 1MB UP-P16DP or UP-I16DP RS232 X 2 Keyboard Driver / Receiver G.A.
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 2. Description of main LSI’s 2-1.
P10 P11 P12 P13 P14 P15 P16 P17 D15 D14 D13 D12 D11 D10 D9 D8 2) Block diagram P27/A23 Data bus P26/A22 Port 1 Port 2 P25/A21 P24/A20 P23/A19 P22/A18 P21/A17 Clock oscillator X Watch dog timer E MD2 MD1 H8/500 CPU A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 Address bus XTAL Address bus EXTAL Data bus (Upper) Data bus (Lower) P20/A16 DTC MD0 RES STBY NMI Interruption controller AS P37 RD P36 HWR P35 16bit free running timer x 2ch Refresh controller RFSH Port 3
3) Pin description /RES Signal name /RESET In/ Out In 2 NMI NMI In 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 VSS D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 VSS A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 VSS A16 A17 A18 A19 A20 A21 A22 A23 VSS P30 GND D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 GND A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 GND A16 A17 A18 A19 A20 A21 A22
2-2. G.A.
2) Block diagram MPCA8 A23-A0 IPLONZ VMEMZ DROS1Z RASPN1 RASPN1E RASPN12Z RASPN2 RASPN2E D0-D7 DECODE SSP COMPARISON REGISTER BAR IRTX IRRXZ RCRXZ BUFFER IR CONTROL ASZ RDZ WRZ RDOZ WROZ PHAI RESETZ RESZ VRESC POFFZ VWAITZ EXWAITZ TXDI SCKI RXDI SERIAL CHANNEL SELECT (for CKDC) WAITZ MCRINT MCRINTZ RDD1 CLS1 RCP1 MCR I/F USART X2 INT CONTROL RDD2 CLS2 RCP2 TPRDY TPTRDYZ TPRRDYZ TPTXD TPRXD TPCKI UASCK UARXZ UATXZ DAX1 DAX2 READ WRITE CONTROL WAIT CONTROL SSPRQZ HTS1 SCK1 STH2 HTS2 SCK2
3) Pin description Pin No. Name I/O Pin No.
Pin No. Name 105 DAX2 I/O Pin No. Name 156 RDD2 ICS SERIAL IN FROM MCR TRACK1 157 CLS2 ICS CARD SENSE ON MCR TRACK1 Description OSCO IR CLOCK (7.
41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 SL00 SL01 SL02 SL10 SL11 SL12 SL20 SL21 SL22 SL30 SL31 SL32 /CD0 BRK0 TRNEMP0 RCVRDY0 TRNRDY0 /CTS0 RCVDT0 VCC GND /CI0 /RTS0 /CS0 /CD1 BRK1 TRNEMP1 RCVRDY1 TRNRDY1 /CTS1 RCVDT1 /CI1 /RTS1 /CS1 /CD2 TRNEMP2 RCVRDY2 TRNRDY2 CTS2Z RCVDT2 /CI2 /CS2 /CD3 BRK3 TRNEMP3 RCVRDY3 TRNRDY3 /CTS3 RCVDT3 /CI3 /CS3 D0 D1 D2 D3 GND D4 D5 D6 D7 GND VCC X1 X2 XOUT TRCK AB0 AB1 US1CH PX /POF /RSRQ /TRV RX
2) Block diagram OPC2 OPC1 DATA BUS OPC1~USART BAUD RATE GENERATOR BAUD RATE GENERATOR USART USART USART USART A B C D USART Common input 3) Pin description Pin NO.
Pin NO.
Pin NO. 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 Name ER-A770 VCC GND /CSD TRNDTD /DTRD /RTSD RCVDTD /CTSD /DSRD TRNRDYD RCVRDYD TRNEMPD SYCBKD /WIN /RIN RSLCT0 RSLCT1 RST MCLK VCC GND VCC NC NC NC GND GND GND NC NC NC NC /WRH /RDH AH0 AH1 RES USART CLK USART I/O Description IS O O O IS IS IS O O O IO I I I I IS I +5V GND +5V NC NC NC GND GND GND NC NC NC NC Write signal Read signal Address bus Address bus Reset signal Clock (4.
3) General description Pin No. The CPUs are fourth-generation enhanced microprocessors with exceptional computational power. They offer higher system throughput and more efficient memory utilization than comparable second- and third-generation microprocessors. The internal registers contain 208 bits of read/write memory that are accessible to the programmer.
D0 CLK/TRG0 D1 ZC/TO0 D2 CPU DATA BUS D3 CLK/TRG1 D4 ZC/TO1 D5 D6 CLK/TRG2 D7 ZC/TO2 CHANNEL SIGNALS CE CLK/TRG3 CS0 CTC CONTROL FROM CPU CS1 M1 RESET IORQ RD DAISY CHAIN INTERRUPT CONTROL Z80 CTC IEI IEO INT CLK +5V GND Figure 1. Pin Functions Programming the CTC is straightforward: each channel is programmed with two bytes: a third is necessary when interrupts are enabled. Once started, the CTC counts down, automatically reloads its time constant, and resumes counting.
Pin No. 35 36 37 38 39 40 41 42 43 44 Symbol CS1 CLK/TRG3 CLK/TRG2 NC NC CLK/TRG1 CLK/TRG0 NC +5V NC Signal name S A1 S TM1 S TM0 NC NC S INTS VCC NC VCC NC In/Out In In In — — In In — — — 3) Pin configuration Function Channel select signal External clock / timer signal External clock / timer signal NC NC External clock / timer signal +5V NC +5V NC Pin No.
(a) I/O address generation circuit 2-7. MB62H149 1) Outline The MB62H149 is a semi-custom LSI chip for the peripheral circuits in the SRN (SHARP Retail Network), its main function is to communicate data with the host CPU and control the peripheral circuits and transmission control circuits of the Sub CPU (Z-80). Fig. 2.
3) Terminal Name and Description (MB62H149) 23.9 ± 0. 6 20 41 64 14 17.9 ± 0.4 40 65 INDEX 80 25 LEAD 1 NO 0.8 ± 0.15 0.35 ± 0.1 24 Fig. 7 Pin No.
2-8.
3) Pin configuration Pin No.
Pin No. 115 116 117 118 119 120 121 122 123 124 125 126 127 128 Signal name MD6 MD5 MD4 MD3 MD2 MD1 MD0 GND VCC RESET GND GND GND XO Symbol MD6 MD5 MD4 MD3 MD2 MD1 MD0 GND VDD RESET MINTEST TEST GND XO In/ Out I/O I/O I/O I/O I/O I/O I/O In In In In In In Out Function Memory data Memory data Memory data Memory data Memory data Memory data Memory data GND +5V Reset signal GND GND GND 25.175MHz 2-9.
2-10. ISP2032 This IC has been developed specially for UP-3300 to achieve VGA CHIP and PSRAM interfaces. Pin No. Name I/O 32 RASPN2 In 33 /RASPN12 In 34 35 36 37 /AS /RD /RFSH /SMEMR In In In Out 38 /SMEMW Out 39 40 41 42 43 44 GND /COE0 /IORD /IOWR /SBHE /VIO2 Out Out Out Out Pin descriotion Pin No.
3-2. 0page area 3-3. I/O areas The 0page area consists of four spaces: the ROM mapped area, internal and external I/O areas. The ROM mapped space have been devised for the following purposes: The addresses from 00FF80h to 00FFFFh are called the internal I/O area. The internal I/O area is a space where the control registers and built-in ports inside the CPU are addressed. The external I/O area is a space where the peripheral devices outside the CPU or devices on an optional card are addressed.
3-6. Extended I/O area The addresses from F00000h to FFFFFFh are called an extended I/O area. The ER-A770 uses the following addresses as the break address register (BAR) for SSP. • FFFF00h ∼ FFFFFFh 4. LCD display The ER-A770 uses a 320 x 240 dot monochromatic LCD for the main display and VGAC (MN89303A) for the display controller which is connected to H8/510 in the ISA bus connection mode. 4-1. Block diagram Here is the block diagram of the LCD and its allied components.
6. Pseudo SRAM (Standard) 7-2. Device control The device is a TOSHIBA 4MB SRAM (TC51V8512AFT 512K 8bit) with an access time of 120ns. After resetting, the device automatically enters the array read mode and perform the same action as the usual ROM, thus requiring no special consideration when reading data. 6-1. CPU interface Data can be written at high speed by using the page buffer. The figure below shows a typical pseudo SRAM interface in the ERA770.
10. WAIT control The weight control function built in the MPCA8 is used to provide an interface with low-speed devices. 10-1. Block diagram The block diagram of the wait control function is shown.
Flow chart 13. Reset sequence The reset sequence block diagram is shown below. Note that RESET signal (system reset) and CKDCR signal (CKDC reset) are different from each other. Star t CKDC start condition read VCC SLIDE SW CKDCR (CKDC reset) No Hard reset start? CKDC9 STOP POFF Yes *Slide Switch operation POWER SUPPLY CPU RESET (System reset) INT0 IRQ0 PASSWORD judgement 13-1.
17-2. MCR interface 15. SRN The SRN of the ER-A770 use the same topology as previous models. The operating timing of the MCR interface signals is given below. (1) Example of timing 16. RS232 Two standard RS232 channels are compatible with the ER-A5RS. However, while the ER-A5RS uses the IRQ2 terminal of the CPU for interruption of the RS232, the ER-A770 cannot use the IRQ1 terminal instead of it. (The IRQ2 terminal is used for IR as the SCK1 terminal.
A B C D VCC 7 6 8 A16 A17 A18 A19 A20 A21 A22 A23 C238 C239 C223 C231 C215 C249 C230 C180 A16 A17 A18 A19 A20 A21 A22 A23 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 D0 D1 D2 D3 D4 D5 D6 D7 7 100pF X8 C193 C214 C207 C201 C224 C216 C208 C202 100pF X8 D8 D9 D10 D11 D12 D13 D14 D15 100pF X8 C232 C250 C251 C233 C240 C259 C241 C225 C222 R186 R189 R190 R187 R230 R234 R78 R77 X8 X8 A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 X24 10K 10K R180 R216 R210 R212 R205 R20
A B C D 0.1uF C79 /VIO2 /VMEM2 15 14 13 12 11 10 9 7 R128 74LV138 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 IC48 0 C182 VCC 13 12 11 8 IC41 VCC --- GND 7PIN - - - GND IC41 14PIN - - - VCC 74HC00 IC41D IC48 VCC --- GND 0.1uF VCC 8PIN - - - GND G1 G2A G2B A B C 33 R129 /RES A0 33 0 R135 R121 IC48 16PIN - - - VCC A20 PCE21E PCE21O PCE22O PCE22E 330pF X2 C162 C157 /VWAITI /VWAIT /VMEM /VMEM2 /HWR /LWR # C158 47pF 2 1 3 0.
A B C D 8 NORDY 100pF C213 1K R203 VCC FLASH ROM 8 /FROS1 7 A21 7 0 R204 3 2 1 NOT USED A[0..
A B C D 13 12 VMEM 10 9 VMEM 5 4 VMEM 13 12 1 4 IC25D IC22A 1 4 /RESET 2 1 VMEM 5 8 7 IC26D 74LVX08 1 4 7 11 PCE21E PCE22E PCE21O 7 /RESET /RESET /RESET 5 4 VMEM 13 12 VMEM 10 9 VMEM 10 9 PCE22O /RESET /RESET 4 1 4 IC25A IC24C IC25C 1 4 IC24D 7 74LVX00 1 4 IC25B 7 74LVX00 7 74LVX00 1 4 7 74LVX00 1 4 7 74LVX00 1 4 7 7 1 4 IC24B 74LVX00 2 1 VMEM VMEM IC26C 74LVX08 8 from MPCA RASPN1E from MPCA RASPN1 /RESET VMEM 11 3 11
A B C D for CKDC CN 8 10K X3 330pF A[0..23] C118 0.1uF D[8..15] 100pF RASPN2 RASPN2E RASPN1 RASPN1E /RASPN12 C126 /POFF /KRQ HTS1 /SCK1 STH1 MPCA8 8 X5 X5 C123 C130 C12 10uF/16V C141 VCC C135 C109 0.1uF 7 A[0..23] /VMEM C131 100pF /FROS1 D[8..
A B C D 8 MCR I/F 8 7 5045-0810 8 7 6 5 4 3 2 1 CN11 MCR CN 7 CLS1# RDD1# RCP1# CLS2# RDD2# RCP2# VCC FB40 6 FB12 6 BLM31 X6 FB13 FB37 FB14 FB35 5 R111 4.
A B C D 8 OPC2 8 AH0 AH1 100pF AH0 AH1 C95 R59 10K X3 VCC C101 R67 A[0..5] FL2 RCORF6702BHZZ C103 330pF VCC 7 C96 X2 R65 10K X2 CLK_USART /SRCS /CS1 R68 10K VCC PLZ BE SHORT PATTERN! 7 D[8..
A B C D 8 RS232 8 7 /DSR2 RCVDT2 /DSR1 RCVDT1 7 C69 100pF C61 100pF /DCD2 /CI2 /DCD1 /CI1 /DCD2 /CI2 C71 100pF /RTS2 6 /CTS2 /DTR2 TXD2 C56 100pF /RTS1 /CTS1 /DTR1 TXD1 /DCD1 /CI1 6 8 C62 100pF C51 100pF IC3B SN75189 5 IC3A SN75189 5 7PIN - - - GND IC3 14PIN - - - VCC 6 3 4 9 8 2 6 11 /DSR2 7 10 4 5 13 12 /DTR2 2 /RTS2 15 RCVDT2 3 16 7 4 /CTS2 14 TXD2 1 11 /DSR1 MC145406 9 10 /RTS1 1 6 13 /CTS1 5 2 12 MC145406 16 3 15 IC
A B C D 8 9 10 S_DACK2 S_DACK3 VCC IC42A IC42 VCC---GND C47 0.1uF /TC IC44F 74HC04 4 1 1 1 3 1 2 R64 0 5 S_DACK0 2 C227 100pF 3 X1 CSTCS16MX040 1M 74HCU04 2 R50 14 VCC /RDH /WRH 3 7 /SINT AH0 AH1 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 4 74HCU04 IC42B C8 0.
A B C D 8 13 12 SRN2 8 74LV08 IC6D 11 SRN_RTS TDI 7 COL RDI /SRN_RTS 7 560 R19 IC6C +12V D1 1SS353 C53 0.1uF R13 15K 74LV08 6 VCC 10 9 6 8 C4 0.22uF/50V 7 5 6 4 3 9 11 10 12 13 1 5 8 TP2 5 IC5A SN75115 G A N B D RT RTC STRB 8 IC5B SN75115 1.6K V C C 1 6 VCC V C C 1 6 VCC 1.6K R24 YP YS YP YS C5 0.1uF/50V R26 3 G A N B D RT RTC STRB 2 IC9 KIA7806 2 2 1 14 15 1 3 TP1 Q8 2SC4699K 4 G R1 150 3W +12V 4 D 2SJ187 Q7 S VR1 20K VOL.
A B C D 8 DRSNS DRAWER 8 +20V 7 C66673 FB3 7 /DRAW1 /DRAW0 5 1000pF 47K 10K C54 R11 R8 2.2K IC7 TD62308F 5 R6 6 6 DOPS 4 DRSNS /DR1 /DR0 4 C66673 FB1 C66673 FB9 C39 0.1uF C40 0.1uF 3 C76 0.1uF 3 +20V VRES C37 0.1uF C38 0.1uF 2 FB2 C66673 ICP1 ICP1.
A B C D 7 8 MLX 5274-02A CN9A C10A 7 0.01uF/100V (103K) T1.6AL/250V UL/CSA 1.5A/125V F3A +24V/+5V POWER CIRCUIT 8 C11A 1uF 50V CP301 BD1A 6 6 R86A 9.1KG R82A 15KG R79A 6.2KG +20V C9A 4700uF 50V C13A 10uF/50V 5 4.3K 2200pF C125A IC19A L4960H R105A C15A 10uF/50V ZD1A MTZ5.1A R88A 2.7K IC18A L4960H NU R106A 5 2 3 4.
A B C D B KTD1413 8 3K R224A 30KF R241A 10K R245A 10K VCC 300 E C R240A 51K 1 2 3 R223A 5.1KF 100K VCC 14 R242A 1.1K R239A 6.2K 4 5 R238A 4.3K VCC C242A 0.015uF R236A 1.5K VCC BA10339F 1 IC36AA R237A 7 C252A 330pF 6 7 7 +20V DC-DC CNV CIRCUIT 8 6 1 2 3 +20V 1 2 3 +20V 6 T500mA/250V (V) 10 11 1 2 3 +20V IC36AC BA10339F 8 9 BA10339F 13 IC36AD BA10339F 2 IC36AB C226A 0.1uF +20V F4A R229A 1.5K VCC UL/CSA 500mA/125V (U/A) 5 5 R5A 1W 0.
A B C D 8 20 5061 080 053 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 CN6B 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 C3 CHIP 47uF/25V MOTHER CN CN6A 1 01 2 02 3 03 4 04 5 05 6 06 7 07 8 08 9 09 10 10 11 11 12 12 13 13 14 14 15 15 16 16 17 17 18 18 19 19 20 20 21 21 22 22 23 23 24 24 25 25 26 26 27 27 28 28 29 29 30 30 31 31 32 32 33 33 34 34 35 35
A B C D * VFD POWER SUPPLY -29V VF2 VF1 -29V VF2 VF1 C3 0.1u VCC IS NOT USED. C2 10u/16V NOT USED BY ER-A770 C1 10u/10V OS 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 CON4 MLX 5597-18CPB CKDC 2. CKDC PWB 8 7 0 R34 0 R27 POPUP CON2 +24V VCKDC FB3 FB6 FB8 7 VF2R COM/AP SF SG SE SD G6 G5 G4 -29V G3 G2 G1 G0 ID DP SC SB SA VF1R FB1 FB2 FB5 C7 470p C5 470p 6 C4 470p 1 2 3 4 5 6 7 8 9 CON5 1 2 3 4 5 6 7 8 9 10 11 CON3 KEYIF.
A B C D VCC R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 ST3 2-5B 8 47K x12 ST0 ST1 ST2 2-5C 2-5C 2-5B KEY I/F 8 /KR0A /KR1A /KR2A /KR3A /KR0B /KR1B /KR2B /KR3B /KR0C /KR1C /KR2C /KR3C ST3 ST0 ST1 ST2 1 2 3 4 5 6 7 8 9 10 11 12 CON2 VCC 74LS138 G1 G2A G2B A B C IC2 74LS138 G1 G2A G2B A B C IC1 7 /KR0A /KR1A /KR2A /KR3A /KR0B /KR1B /KR2B /KR3B /KR0C /KR1C /KR2C /KR3C 6 4 5 1 2 3 6 4 5 1 2 3 7 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 KEX0 KEX1 15 14 13 12 11 10 9 7 15 1
A B C D EH S2B 2 1 CON6 EH S2B 2 1 CON4 4 3 2 1 CON5 NOT USED 8 MLX52044-1245 12 11 10 9 8 7 6 5 4 3 2 1 CON2 R1 4.7K C6 1uF 16V 3. INVERTOR PWB 8 7 7 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 CON1 LT1184CS NC NC SHDN AGND VC DIO ICCFL PGND IC1 MLX 53048-1510 8 7 6 5 4 3 2 1 18pF/3KV C1 6 NC NC REF VIN ROYER BAT BULB VSW 6 9 10 11 12 13 14 15 16 SFPB54 D2 D1 SFPB54 C3 1000pF 5 R5 8.2KG R6 3.3K 5 R3 100K 220K R2 4 C2 2.
L N 8 7 6 5 4 J2A TRCN CN2A 3 2 POWER TRANS 2 1 1 D A C2 0.1uF 250V J1A 120V 3 A C1A 0.1uF 250v SL1A RCILC6654BHZZ 4 B POWER SWITCH 390K 1/2W R1A (U/A) 5 B UL/CSA 1.5A/125V F1A S1A N/F PWB 6 C BLOCK T/M CN1A 7 C D 4.
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - CHAPTER 9. PWB LAYOUT 1.
2.
3. Mother PWB 4.
5. Inverter PWB 6.
ER-A770U/A PARTS GUIDE MODEL ER-A770 (for U.S.A,Canada) CONTENTS 1 Top cabinet etc. 2 Bottom cabinet etc. 3 Packing material & Accessories 4 Main PWB unit 5 Mother PWB unit 6 CKDC PWB unit 7 NF PWB unit 8 Inverter PWB unit 9 Service tools F Supply ■ Index Because parts marked with "!" are indispensable for the machine safety maintenance and poeration, it must be replaced with the parts specific to the product specification.
ER-A770U/A 1 Top cabinet etc. NO.
ER-A770U/A 1 Top cabinet etc.
ER-A770U/A 2 Bottom cabinet etc. NO.
ER-A770U/A 2 Bottom cabinet etc.
ER-A770U/A 3 Packing material & Accessories NO.
ER-A770U/A 4 Main PWB unit NO.
ER-A770U/A 4 Main PWB unit NO. 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 PARTS CODE VHD1SR159//-1 VHD1SS353//-1 VHDCP301///-1 VHDRB160L-401 VHEMTZ5.1A/-1 VHEPTZ30B++-1 VHEPTZ5.
ER-A770U/A 4 Main PWB unit NO.
ER-A770U/A 7 NF PWB unit NO. ! PARTS CODE QCNCW7199BH0E QFS-B1002CCZZ QFSHD2109AFZZ QSW-C1262QCZZ QTANN6658RCZZ RC-FZ1041RC2E RCILC6654BHZZ VRD-RB2HY394J (Unit) 901 C P W B F 2 8 6 7 B H 0 3 1 2 3 4 5 6 7 8 PRICE NEW RANK MARK AE AE AC AR AH AE AR AA BF N PART RANK C A C B C C C C E DESCRIPTION Connector (35328-0510) Fuse (UL/CSA 1.5A/125V)(QFS-B1037CCZZ) Fuse holder (HD2109AF) Power switch (AJ7241B) Block terminal Capacitor (250WV 0.
ER-A770U/A ■ Index PARTS CODE [C] CKOG-6724BHZZ CPWBF2867BH03 " CPWBN7511BH04 " CPWBN7512BH01 CPWBX2868BH01 " CPWBX2869BH02 " CSHEP6817BH01 [D] DUNTK4783BHZZ [G] GCABA7205BHZB GCABB7202BHSC GCABF2551BHZZ GCABR7256BHSA GCOVA7080BHSC GCOVA7085BHZB GCOVA7086BHZA GCOVA7131BHSB GCOVB2503BHZZ GCOVB7082BHZZ GCOVH7133BHZZ GCOVH7150BHZZ GFTAB6788BHZD GFTAS6787BHSC GFTAS6789BHSC GFTAS6790BHSC GFTAS6927BHSA GLEGG6656BHZZ GLEGG6659BHZZ GLEGP6657BHSA GLEGP6658BHSA [H] HDECP2369BHZZ [L] LANGK2884BHZZ LANGK7617BHZZ LAN
ER-A770U/A PARTS CODE RCRMZ1016LCZZ RCRSP5019BCZZ RCRSP6664RCZZ RCRSP6676RCZZ RCRSZ2407RCZZ RCRSZ6644RCZZ RMPTQ4330QCJJ RTRNH2419RCZZ RTRNH6896RCZZ RTRNP2418BHZZ RVR-B2410QCZZ RVR-M2415QCN3 [S] SPAKA3129BHZZ SPAKA3145BHZZ SPAKA8409BHAL SPAKA8410BHAR SPAKA8435BHZZ SPAKA8447BHZZ SPAKC3132BHSA SSAKA5004CCZZ SSAKH0003DHZZ SSAKH3015CCZZ SSAKH4231CCZZ [T] TCADH6788BHZA TCAUZ6684BHZA TCAUZ6685BHZB TINSE4854BHZZ TINSK4855BHZZ TLABG6967BHZZ TLABG7097BHZZ TLABH7100BHZZ TLABH7101BHZA TLABH7105BHSA TLABS7021BHZZ [U] U
ER-A770U/A PARTS CODE VRS-TS2AD472F VRS-TS2AD472J " " VRS-TS2AD473J " VRS-TS2AD512F VRS-TS2AD513J VRS-TS2AD561J VRS-TS2AD562J VRS-TS2AD563J VRS-TS2AD622F VRS-TS2AD681J VRS-TS2AD751J VRS-TS2AD822G VRS-TS2AD912G VRS-TS2HD122J VRS-TS2HD130J VS2SA1270-/-1 VS2SC4699KP-1 VS2SC5001R/-1 VS2SJ187-//-1 VSDTA144EK/-1 VSDTC114YK/-1 " VSKTA1273//-1 VSKTC3199//-1 VSKTD1413++-1 VVLLM320153-1 [X] XBBSD30P06000 XBBSD40P12000 XBPBZ40P06K00 XBPSD30P06000 XBPSD30P06K00 XBPSD30P08KS0 XEBSD30P06000 " XEBSD30P08000 " XEBSD30P100
>>>>> USE FONT <<<<< Helvetica/ Helvetica-Condensed/ Century-Schoolbook/ Symbol & OriginalFonts: (RingWorld2/RingFont2/Pa Symbol/PartsCod) - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - COPYRIGHT 2000 BY SHARP CORPORATION All rights reserved. Printed in Japan. No part of this publication may be reproduced, stored in a retrieval system, or transmitted.