User`s guide

LZ87010 Advance User’s Guide Interrupts
1/15/03 12-9
12.3.3 IE1 (Interrupt Enable 1) Register
The IE1 (Interrupt Enable 1) register contains individual interrupt enable bits for
extended interrupts.
Table 12-9. IE1 Register
BIT 7 6 5 4 3 2 1 0
FIELD EX2 EDAC1 EDAC0 EADC ES1 EI2C ET2T3 ET4T5
RESET 0 0 0 0 0 000
RW RW RW RW RW RW RW RW RW
ADDR 0xE8
Table 12-10. IE1 Register Bits
BIT NAME DESCRIPTION
7EX2
Enable Extended Interrupt 13 (INT[7:2]) If ‘1’, external interrupts INT[7:2] are
enabled. If ‘0’, they are disabled.
6EDAC1
Enable Extended Interrupt 12 (DAC 1) If ‘1’, DAC 1 interrupts are enabled.
If ‘0’, they are disabled.
5EDAC0
Enable Extended Interrupt 11 (DAC 0) If ‘1’, DAC 0 interrupts are enabled. If
‘0’, they are disabled.
4EADC
Enable Extended Interrupt 10 (ADC) If ‘1’, ADC interrupts are enabled. If ‘0’,
they are disabled.
3ES1
Enable Extended Interrupt 9 (UART 1) If ‘1’, UART 1 interrupts are enabled. If
‘0’, they are disabled.
2EI2C
Enable Extended Interrupt 8 (I
2
C) If ‘1’, I
2
C interrupts are enabled. If ‘0’, they
are disabled.
1 ET2T3
Enable Extended Interrupt 7 (Timer 2 and Timer 3) If ‘1’, Timer 2 and Timer
3 interrupts are enabled. If ‘0’, they are disabled.
0 ET4T5
Enable External Interrupt 6 (Timer 4 and Timer 5) If ‘1’, Timer 4 and Timer 5
interrupts are enabled. If ‘0’, they are disabled.