User`s guide

LZ87010 Advance User’s Guide I

C Interface

1/15/03 15-5

15.4.2 ICSAR (I

C Slave Address) Register

The ICSAR register holds the unit address used by the interface when in Slave mode. In

7-bit addressing mode, the entire address is contained in this register, plus a read/write

data-direction bit. In 10-bit addressing mode, this register holds the lower 8 address bits,

and the upper two bits and the R/W bit are in the ICUSAR register. This register is not used

in Master mode.

Table 15-6. ICSAR Register

BIT 7 6 5 4 3 2 1 0

FIELD S_ADDR[7] S_ADDR[6] S_ADDR[5] S_ADDR[3] S_ADDR[3] S_ADDR[2] S_ADDR[1] S_ADDR[0]

RESET 00000000

RW RW RW RW RW RW RW RW RW

ADDR 0xB5

Table 15-7. ICSAR Register Bits

BIT NAME DESCRIPTION

7:0 S_ADDR

Slave Address In 7-bit addressing mode, S_ADDR[7:1] holds the I

C inter-

face’s slave address. In 10-bit addressing mode, S_ADDR[7:0] holds the low-

er 8 bits of the slave address. In 7-bit mode, S_ADDR[0] is used for read/write

control of the data transfer:

0 = Write

1 = Read