User`s guide

1/15/03 16-1

Chapter 16

Debug Interface

16.1 Theory of Operation

The SHARP Debug Interface (SDI) consists of sophisticated on-chip debugging hardware

including support for multiple hardware breakpoints and unlimited software breakpoints,

plus a 128-element branch trace buffer. A sophisticated trigger mechanism allows break-

points to be set on ranges of code or data addresses or on data values.

Communication to external debuggers is provided over a high-speed, two-wire serial inter-

face, using SDI_CLK and SDI_DATA. SDI_CLK is an input to the LZ87010, and is driven

by the external debugging hardware. SDI_DATA is a bidirectional serial data signal.

The LZ87010 features a Debug mode that is entered when requested by the serial debug

interface or when a breakpoint is encountered. Debug mode halts the processor and

allows the state of the system to be examined or altered over the Debug interface. While

in Debug mode, single-step execution can also be used. When Debug mode is exited, exe-

cution continues from where it left off when Debug mode was entered, unless the user

explicitly alters the execution address.

The timers and other system peripherals continue to run in Debug mode, but their inter-

rupts will not be serviced until Debug mode is exited.

A typical system implementation consists of a debug connector carrying the SDI_DATA

and SDI_CLK signals and a bi-directional RESET, allowing the debugger to both monitor

and control the system reset state. Such a connection is shown in Figure 16-1. This con-

nector is used on the SHARP KEV87010 Evaluation Board, using a standard 10-pin keyed

male header with 2 rows of 5 pins on 0.100″ centers. A ribbon cable can be plugged into

this connector to connect it with a debugging unit such as the ISA-M8051EW from First

Silicon Solutions, Inc.

Figure 16-1. SHARP Debug Interface (SDI) Wiring

SDI_DATA

RESET

SDI_CLK

VCC

LZ87010

LZ87010-73