User`s guide

1/15/03 1-1

Chapter 1

Introduction

1.1 Features

• 8-bit, 40 MHz, 8051-compatible CPU core:

– Two-clock Machine Cycle

– Equivalent to a 240 MHz 8051

• Two-wire Debug Interface with Breakpoint and Trace

• 64KB On-chip Flash Program Memory

– Enough Memory for Demanding Applications

– In-circuit Serially Programmable

– New 8051 Instruction for Writable Code Memory

• External (Off-chip) Program Memory Interface

– 16-bit Address/8-bit Data Busses

– Supports Reads and Writes

• 4KB On-chip MOVX Data RAM

• 256 Bytes Scratchpad RAM

• Six 16-bit Multifunction Timer/Counters

– Two 8051-compatible Timers

– Two with Capture/Compare/PWM Capability

– Two with Compare/PWM Capability

• Serial Interfaces

– Two 8051-compatible UARTs, One with a Dedicated Internal Baud Rate Generator

–I

C™ Interface

• A/D Converter

– Eight Analog Inputs, 12-bit Resolution

– 500,000 Samples/second

• D/A Converters

– Two Independent Analog Output Channels

– 8-bit Resolution

• Waveform Generators

– Twin D/A Converters are Driven by Dual Waveform Generators with

128-byte Wavetable RAMs

– Flexible Clocking and Indexing

• Sixteen High Current Output Pins

• Up to 56 General-Purpose I/O Pins