User`s guide

LZ87010 Advance User’s Guide Introduction
1/15/03 1-15
1.7 Register Summary
The registers of the LZ87010 are listed in Table 1-7. As in the 8051, registers with
addresses ending in 0x0 or 0x8 are bit-addressable.
Figure 1-7. Register Description by Functional Unit
NAME ADDRESS* DESCRIPTION
ADC REGISTERS
ADCC 0xC3 ADC Control
ADCDL 0xC1 ADC Data [3:0]
ADCDH 0xC2 ADC Data [11:4]
CPU CORE REGISTERS
ACC 0xE0* Accumulator
ALTFEN1 0x95 Alternate Function Enables
B 0xF0* B Register
CLKCFG 0x94 System Clock Configuration
DPH 0x83 Data Pointer [15:8]
DPH1 0x85 Data Pointer 1 [15:8]
DPL 0x82 Data Pointer [7:0]
DPL1 0x84 Data Pointer 1 [7:0]
DPS 0x86 Data Pointer Select and Extended Operation
IE 0xA8* Interrupt Enable
IE1 0xE8* Interrupt Enable 1
IP 0xB8* Interrupt Priority Control
IP1 0xF8* Interrupt Priority Control
IPH 0xB9 Interrupt Priority Control
IPH1 0xF9 Interrupt Priority Control
PSW 0xD0* Program Status Word
SP 0x81 Stack Pointer
EXTERNAL MEMORY REGISTERS
XMCFG 0xC5 External Memory Configuration
FLASH REGISTERS
FLASHCFG 0x96 Flash Memory Configuration
FLASHTB 0x97 Flash Write Timebase
I
2
C REGISTERS
ICCON 0xB4 I
2
C Configuration
ICDATA 0xB7 I
2
C Data
ICDBUG 0xBE I
2
C Debug
ICHCNT 0xBC I
2
C Clock HIGH Time
ICLCNT 0xBD I
2
C Clock LOW Time
ICSAR 0xB5 I
2
C Slave Addr [7:0]
ICSTAT 0xBF I
2
C Status
ICUSAR 0xB6 I
2
C Slave Addr [9:8]
I/O PORT REGISTERS
P0 0x80* General-Purpose I/O Port 0
PORT 1 0x90* General-Purpose I/O Port 1
PORT 2 0xA0* Output Port 2