User`s guide

LZ87010 Advance User’s Guide Introduction
1/15/03 1-21
NOTE: *‘External’ data memory is actually on-chip in the LZ87010.
SUBB A,dir Subtract direct byte from A with borrow 2 1
SUBB A,Rn Subtract register from A with borrow 1 1
SWAP A Swap nibbles of A 1 1
TRAP Software break command 1 1
XCH A,@Ri Exchange A and indirect memory 1 1
XCH A,dir Exchange A and direct byte 2 1
XCH A,Rn Exchange A and register 1 1
XCHD A,@Ri Exchange A and indirect memory nibble 1 1
XRL A, @Ri Exclusive-OR indirect memory to A 1 1
XRL A,#d Exclusive-OR immediate to A 2 1
XRL A,dir Exclusive-OR direct byte to A 2 1
XRL A,Rn Exclusive-OR register to A 1 1
XRL dir,#d Exclusive-OR immediate to direct byte 3 2
XRL dir,A Exclusive-OR A to direct byte 2 1
Table 1-4. Operand Types
SYMBOL DESCRIPTION
#d Immediate data, 8 bits wide, included as part of the instruction
#dd Immediate data, 16 bits wide, included as part of the instruction
@Ri
Indirect addressing mode. Register R0 (if i=0) or R1 (if i=1) contains the 8-bit address
of the operation. The full range of 0x00 to 0xFF refers to internal RAM.
addr 11
11-bit address. The upper 5 bits of the program counter are used to extend this ad-
dress to 16 bits. This form of addressing is limited to the 2KB block of memory con-
taining the instruction.
addr 16 16-bit absolute address, included as part of the instruction
bit Direct-addressed bit in internal RAM or SFR
dir
Direct addressing mode. Addresses 0x00-0x7F refer to internal RAM. Addresses
0x80-0xFF refer to SFRs.
rel Two’s complement address offset, relative to the program counter
Rn Register R0-R7 in the currently selected register bank
Table 1-3. Instruction Set Summary (Cont’d)
INSTRUCTION DESCRIPTION BYTES CYCLES