User`s guide

LZ87010 Advance User’s Guide Enhanced Timers
1/15/03 8-3
8.1 Enhanced Timer Signals
8.2 Enhanced Timer Theory of Operation
8.2.1 Reading 16-bit Timer Registers
Because the LZ87010 has an 8-bit data path, while the timers are 16 bits wide, it takes two
read operations for a program to retrieve the timer value. To allow the registers to be
updated while the timers are running, while avoiding the coherency problems that can
occur when the registers are updated one at a time, the LZ87010 has special circuitry for
reading the 16-bit count data register pairs (T(x)CNTH and T((x)CNTL) and the capture
data register pairs (T(x)CAP0H and T(x)CAP0L or T(x)CAP1H and T(x)CAP1L).
This mechanism is dependent on the programmer always reading the register pairs in
‘Low, High’ order. If the order is reversed, the value returned for the upper 8 bits will be
that of the previous read, not the current one.
When the least significant byte of the register pair is read (for example, T2CNTL), the
LZ87010 copies, at the same time, the most-significant byte (T2CNTH), to a shadow reg-
ister. When a program reads T2CNTH, it is this holding register that is read, not the current
value of the upper 8 timer bits. This guarantees that the value returned to the program will
be the actual timer contents at the time T2CNTL was read. See Figure 8-2.
For example:
// Read Timer 2 while it is running.
// Correct order is always LSB first, then MSB.
MOV A,T2CNTL // Read LSB first,
MOV TMPL,A // save it,
MOV A,T2CNTH // then read MSB.
MOV TMPH,A
NOTE: The conventional 8051 practice is to read the high byte, then the low byte, and then the high byte
again, and repeat if the two high bytes are not equal. This method (while appropriate to 8051-
compatible Timer 0 and Timer 1) is not necessary with Timers 2 through 5. It will work, but the
comparison is likely to fail the first time through the loop and succeed on the second.
Table 8-1. Timer 2 - Timer 5 I/O
NAME DIRECTION DESCRIPTION
CTIN2, CTIN3, CTIN4, CTIN5 In External clock inputs for Timers 2 - 5
CTCMP2A, CTCMP2B, CTCMP3A,
CTCMP3B, CTCMP4A, CTCMP4B,
CTCMP5A, CTCMP5B
Out Compare outputs
CTCAP2A, CTCAP2B, CTCAP3A, CTCAP3B In Capture inputs