User`s guide

1/15/03 vii
List of Figures
Preface
Figure 1. Multiplexer................................................................................................... xvii
Figure 2. Register with Bit Field Named..................................................................... xvii
Figure 3. Register with Multiple Bit Fields Named..................................................... xviii
Figure 4. Register with Bit Field Numbered............................................................... xviii
Chapter 1 – Introduction
Figure 1-1. LZ87010 Pin Diagram.............................................................................. 1-3
Figure 1-2. LZ87010 Block Diagram .......................................................................... 1-4
Figure 1-3. LZ87010 Application Diagram Example................................................... 1-8
Figure 1-4. Sharp Debug Interface............................................................................. 1-9
Figure 1-5. External Clock Circuitry.......................................................................... 1-12
Figure 1-6. Simplified System Clocking.................................................................... 1-13
Figure 1-7. Register Description by Functional Unit................................................. 1-15
Chapter 2 – System Clocking
Figure 2-1. System Oscillator Alternatives ................................................................. 2-1
Figure 2-2. Internal Clock Generation ........................................................................ 2-3
Chapter 4 – Internal RAM
Figure 4-1. Memory Map ............................................................................................ 4-2
Chapter 6 – I/O Ports
Figure 6-1. General-Purpose I/O Port (One Bit Shown)............................................. 6-1
Figure 6-2. High-Current Output Port (One Bit Shown).............................................. 6-3
Chapter 7 – 8051-Compatible Timers
Figure 7-1. Timer 0-1 Clocking................................................................................... 7-1
Figure 7-2. Timer Mode 0........................................................................................... 7-2
Figure 7-3. Timer Mode 1........................................................................................... 7-3
Figure 7-4. Timer Mode 2........................................................................................... 7-4
Figure 7-5. Timer Mode 3........................................................................................... 7-5
Chapter 8 – Enhanced Timers
Figure 8-1. Overall Timer Block Diagram ................................................................... 8-2
Figure 8-2. Reading from Count and Capture Registers............................................ 8-4
Figure 8-3. Writing to Compare Registers.................................................................. 8-4
Figure 8-4. Timer Block Diagram (Does Not Show Capture and Compare) .............. 8-6
Figure 8-5. Capture Unit Block Diagram .................................................................... 8-7
Figure 8-6. Compare Unit Block Diagram .................................................................. 8-9
Figure 8-7. PWM Operation ..................................................................................... 8-11
Figure 8-8. PWM Output Signal Timing.................................................................... 8-12