User`s guide

LZ87010 Advance User’s Guide Enhanced Timers
1/15/03 8-15
8.3.2 T(x)CAP(y) (Captured Data) Registers
When a capture event is triggered by asserting an external capture pin, the current 16-bit
timer value is copied into a pair of 8-bit captured data registers, shown in Table 8-8. These
registers are read-only. Half of these registers are low-byte registers (with names ending
in ‘L’), which contain the lower 8 bits of the compare value. Half are high-byte registers
(with names ending in ‘H’), which contain the upper 8 bits of the compare value.
NOTE: Always read the LSB first, then the MSB. See Section 8.2.1.
Table 8-8. Capture Registers
CHANNEL BITS[15:8] BITS[7:0]
Capture 2A T2CAP0H T2CAP0L
Capture 2B T2CAP1H T2CAP1L
Capture 3A T3CAP0H T3CAP0L
Capture 3B T3CAP1H T3CAP1L
Table 8-9. T2CAP0H Register
BIT 7 6 5 4 3 2 1 0
FIELD T2CAP0[15] T2CAP0[14] T2CAP0[13] T2CAP0[12] T2CAP0[11] T2CAP0[10] T2CAP0[9] T2CAP0[8]
RESET 00000000
RW RO RO RO RO RO RO RO RO
ADDR 0xDB
Table 8-10. T2CAP0L Register
BIT 7 6 5 4 3 2 1 0
FIELD T2CAP0[7] T2CAP0[6] T2CAP0[5] T2CAP0[4] T2CAP0[3] T2CAP0[2] T2CAP0[1] T2CAP0[0]
RESET 00000000
RW RO RO RO RO RO RO RO RO
ADDR 0xDA
Table 8-11. T2CAP1H Register
BIT 7 6 5 4 3 2 1 0
FIELD T2CAP1[15] T2CAP1[14] T2CAP1[13] T2CAP1[12] T2CAP1[11] T2CAP1[10] T2CAP1[9] T2CAP1[8]
RESET 00000000
RW RO RO RO RO RO RO RO RO
ADDR 0xDD
Table 8-12. T2CAP1L Register
BIT 7 6 5 4 3 2 1 0
FIELD T2CAP1[7] T2CAP1[6] T2CAP1[5] T2CAP1[4] T2CAP1[3] T2CAP1[2] T2CAP1[1] T2CAP1[0]
RESET 00000000
RW RO RO RO RO RO RO RO RO
ADDR 0xDC