Specifications

SPEC No.
LC99213A
MODEL No.
LM10V332
PAGE
21
9. Supply voltage sequence condition
１
500 1500ms MIN. (NOTE 1)
a
(
NOTE 2) e
VDD
YD
LP
Interface timing active operation
１
h
XCK
c
(NOTE 3)
f
DATA
DISP
b
１
4.5 V 3.0V
１
3.5 V 2.0V
１
3 V 2.0V
１
3V 1.0V
VDD
VSS d g
Fig.11 Supply voltage sequence condition
(NOTE 1) Power ON/OFF cycle time. All signals and power line shall be in accordance with above
sequence in case of power ON/OFF.
(NOTE 2) In this period, YD and LP shall be “L” level.
(NOTE 3) Before DISP rise up, the signals of YD,LP,XCK,DATA must be input, and the above
condition of “a” must be satisfied. The signals which comply with the interface timing in
Fig.2,Fig.3, and table 7, must be input.
POWER OFF
Symbol Allowable value
ｅ
0 ms MIN. 1 s MAX.
ｆ
0 ms MIN. 1 s MAX.
ｇ
１
10 ms MIN.
1 ms MIN.
－
１
h
1s MIN.
－
POWER ON
Symbol Allowable value
a 0 ms MIN. 1 s MAX.
b
－
100 ns MAX.
c 50 ms MIN. -
d - 10 ms MAX.