Reference Manual DOC. REV.
WWW.VERSALOGIC.COM 12100 SW Tualatin Road Tualatin, OR 97062-7341 (503) 747-2261 Fax (971) 224-4708 Copyright © 2013 VersaLogic Corp. All rights reserved. Notice: Although every effort has been made to ensure this document is error-free, VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose.
Product Release Notes Rev 5 Release – The power connector (J9) was moved slightly to match the position of the power connector on the VL-EPM-5 (see page 18). Rev 4 Release – New audio codec and Ethernet chips incorporated as a result of component obsolescence. Rev 3 Release – Commercial release. Rev 2 Release – Beta release. Rev 1 Release – Pre-production only. No customer releases. Support Page The EPM-15 support page, at http://www.versalogic.com/private/manxsupport.
Contents Introduction ..................................................................................................................... 1 Description.......................................................................................................................... 1 Features and Construction ..................................................................................... 1 Technical Specifications ..............................................................................................
Contents Clearing CMOS RAM ......................................................................................... 23 CMOS Setup Defaults ...................................................................................................... 24 Default CMOS RAM Setup Values..................................................................... 24 Real Time Clock ............................................................................................................... 24 Setting the Clock...............
Contents Jumper and Status Register............................................................................................... 43 RS-485/422 Transmit/Receive Control Register .............................................................. 44 Appendix A – References ............................................................................................. 45 Appendix B – Generated Frequencies ........................................................................
Introduction 1 Description FEATURES AND CONSTRUCTION The EPM-15 is a feature-packed single board computer (SBC) designed for OEM control projects requiring fast processing and designed-in reliability and longevity (product lifespan).
Introduction Technical Specifications Specifications are typical at 25°C with 5.0V supply unless otherwise noted. Specifications are subject to change without notification. Board Size: 3.55” x 3.775” (PC/104 standard) with 0.
Introduction EPM-15 Block Diagrams DDR SDRAM FS2 JTAG Pads PCI, 3.3V 14.318 MHz Digital RGB 33 MHz 24.576 MHz FP LVDS National DS90C383A PCI Connector LX CPU SDCLKS System Clocking (MK1491-09) Connector Analog RGB AMD System Control Series Terms Address, Data, Control Intel 10/100M Audio I/O Connector USB 2.0 (4 Ports) CS5536 I/O Companion Series Terms 25.000 MHz AMD IDE 48.000 MHz RS-485/422 (2 Ports) CompactFlash Connector 32.
Introduction 5.0V SUSPEND TO RAM POWER 1.2V_SB @ 1 mA TPS79912 3.3V_SB @ 3 mA TPS79933 2.5V_SB @ 1.5A LTC3412 CS5536 Standby CS5536 & CPLD Standby CS5536 Standby RESISTOR DIVIDER DDR VTT/REF SYSTEM POWER ON RESISTOR DIVIDER 2.5V @ 1A Si233DS MOSFET DDR VTT/REF2 CPU VMEM 1.5V @ 2.3A LTC3412 CPU VCORE 1.2V @ 200 mA LTC3025 CS5536 VCORE 3.3V @ 1.
Introduction RoHS Compliance The EPM-15 is RoHS-compliant. ABOUT ROHS In 2003, the European Union issued Directive 2002/95/EC regarding the Restriction of the use of certain Hazardous Substances (RoHS) in electrical and electronic equipment.
Introduction HANDLING CARE Warning! Care must be taken when handling the board not to touch the exposed circuitry with your fingers. Though it will not damage the circuitry, it is possible that small amounts of oil or perspiration on the skin could have enough conductivity to cause the contents of CMOS RAM to become corrupted through careless handling (such as when changing the CompactFlash module), resulting in CMOS resetting to factory defaults.
Introduction Technical Support If you are unable to solve a problem after reading this manual please visit the EPM-15 Product Support web page shown below. If you have further questions, contact VersaLogic technical support at (541) 485-8575. VersaLogic technical support engineers are also available via e-mail at Support@VersaLogic.com. EPM-15 Support Website http://www.versalogic.com/private/manxsupport.
Configuration and Setup 2 Initial Configuration The following components are recommended for a typical development system. EPM-15 Computer ATX Power Supply SVGA Video Monitor Standard I/O Utility Cable (CBR-5010) USB Keyboard USB Floppy Disk Drive IDE Hard Drive (optional) IDE CD ROM Drive (optional) The following VersaLogic cables are recommended.
Configuration and Setup USB Keyboard and USB Mouse Analog SVGA EPM-15 “Manx” CBR – 5009A J1 CBR– 1201 J7 J8 J1 J4 CBR – 5010B J9 CBR– 1008 CBR– 4406 Hard Drive ATX Power Supply CD-ROM Drive OS Installation CD-ROM Power to Drives Figure 3. EPM-15 Typical Start-up Configuration 1. Attach Power Plug the power adapter cable CBR-1008 into socket J9. Attach the motherboard connector of the ATX power supply to the adapter. 2.
Configuration and Setup 3. Review Configuration Before you power up the system, double check all the connections. Make sure all cables are oriented correctly and that adequate power will be supplied to the EPM-15 and peripheral devices. 4. Power On Turn on the ATX power supply and the video monitor. If the system is correctly configured, a video signal should be present. 5. Change CMOS Setup Settings Enter CMOS Setup by pressing Delete during the early boot cycle.
Configuration and Setup CMOS Setup The default CMOS Setup parameters for the EPM-15 are shown below. Basic CMOS Configuration +------------------------------------------------------------------------------+ | System BIOS Setup - Basic CMOS Configuration | | (C) 2005 General Software, Inc.
Configuration and Setup Shadow Configuration +------------------------------------------------------------------------------+ | System BIOS Setup - Shadow/Cache Configuration | | (C) 2005 General Software, Inc.
3 Physical Details Dimensions EPM-15 DIMENSIONS AND MOUNTING HOLES 3.700 3.050 0.150 The EPM-15 complies with all PC/104-Plus standards. Dimensions are given below to help with pre-production planning and layout. All dimensions are in inches. Drawings are not to scale. 3.575 3.375 3.275 3.175 0.200 3.150 3.350 –0.200 0.000 –0.550 0.100 0.000 -0.200 Figure 4.
Physical Details CBR-5010 DIMENSIONS AND MOUNTING HOLES 5.50 5.10 1.575 1.875 1.175 1.95 1.38 0.065 Figure 5.
Physical Details HARDWARE ASSEMBLY The EPM-15 uses pass-through PC/104 and PC/104-Plus connectors so that expansion modules can be added to the top or bottom of the stack. PC/104 (ISA) modules must not be positioned between the EPM-15 and any PC/104-Plus (PCI) modules on the stack. The entire assembly can sit on a table top or be secured to a base plate. When bolting the unit down, make sure to secure all four standoffs to the mounting surface to prevent circuit board flexing.
Physical Details EPM-15 External Connectors D1 C1 B1 A1 J13 Audio J4 Ethernet J2 PC/104-Plus Battery J5 LPT J1 Video Output J6 CompactFlash J8 Standard I/O (COM, USB, timer inputs, reset, LED, speaker) J7 IDE CPU J10 PC/104 B1 A1 C0 D0 J9 Main Power = Pin 1 Figure 7.
Physical Details EPM-15 CONNECTOR LOCATIONS – BOTTOM D1 C1 B1 A1 PC-104-Plus (PCI) pass-through male J12 LVDS PC-104 (ISA) pass-through male B1 A1 C0 D0 = Pin 1 Figure 8.
Physical Details EPM-15 CONNECTOR FUNCTIONS AND INTERFACE CABLES Table 1 provides information about the function, mating connectors, and transition cables for EPM-15 connectors. Page numbers indicate where a detailed pinout or further information is available. Table 1: EPM-15 Connector Functions and Interface Cables Connector Function Mating Connector J1 Video Output FCI 89361-712 or FCI 89947-712 J2 PC/104-Plus (PCI) AMP 1375799-1 J3 2 PLD Reprogramming Port — Transition Cable CBR-1201 1.
Physical Details Breakout Board Connectors CBR-5010 CONNECTOR LOCATIONS 5 J2 ACPI Pushbutton Input J1 Paddle Board 1 1 5 1 J5 COM4 5 J6 COM3 J3 COM1 J4 USB0-3 IDE LED Reset (top) PLED (bottom) USB0 USB1 USB2 USB3 = Pin 1 Figure 9.
Physical Details Jumper Blocks JUMPERS AS-SHIPPED CONFIGURATION 1 1 V2 1 V3 2 V1 (or V5*) 3 2 2 4 6 8 1 3 5 7 2 V4 Figure 10. Jumper Block Locations * Jumper block V1 was labeled V5 on revision 3.xx and earlier boards.
Physical Details JUMPER SUMMARY Table 3: Jumper Summary Jumper Block V1 (or V5*) Description COM4 RS-422/485 Termination As Shipped Page In 27 [1-2] In 23 In 27 In – In 32 In – In 25 In – Line A and B terminated with 127 Ohms Out – No termination Note: Places terminating resistor across COM4 RS-485 TXRX+/TXRXor RS-422 RX+/RX- differential pair.
System Features 4 Power Supply POWER CONNECTORS Main power is applied to the EPM-15 through a 10-pin polarized connector, with mating connector Berg 69176-010 (Housing) + Berg 47715-000 (Pins). See the table below for connector pinout and Figure 7 for location information. Warning! To prevent severe and possibly irreparable damage to the system, it is critical that the power connectors are wired correctly. Make sure to use all +5VDC pins and all ground pins to prevent excess voltage drop.
System Features Note: The +3.3VDC, +12VDC and -12VDC inputs are required only for expansion modules that require these voltages. POWER REQUIREMENTS The EPM-15 requires only +5 volts (±5%) for proper operation. The voltage required for the RS-232 ports is generated with an on-board DC/DC converter. A variable low-voltage supply circuit provides power to the CPU and other on-board devices.
System Features CMOS Setup Defaults The EPM-15 permits users to modify CMOS Setup defaults. This allows the system to boot up with user-defined settings from cleared or corrupted CMOS RAM, battery failure or battery-less operation. All CMOS setup defaults can be changed, except the time and date. CMOS Setup defaults can be updated with the BIOS Update Utility. See the General BIOS Information page for details.
System Features ACPI Power Management The EPM-15 supports the Advanced Configuration and Power Interface (ACPI) “S3 Sleeping State,” also known as “suspend to RAM” mode. Wakeup is accomplished by grounding pin 39 to pin 40 on connector J8 or via pushbutton (or relay attached to the pushbutton interface). Power consumption in standby mode is under 1 watt. Wakeup typically occurs in 1 to 6 seconds. Standby mode functionality has been tested under Windows XP and Windows XP Embedded.
System Features SetSystemPowerState Function The “Power Management Reference” in the MSDN Library (http://msdn.microsoft.com/library/default.asp) contains complete information on the API available for power control under Windows. The “Power Management Functions” section provides complete information on the use of the API. The function used to set the system power state is SetSystemPowerState. This function suspends the system by shutting power down.
Interfaces and Connectors 5 Serial Ports The EPM-15 features three on-board 16550-based serial channels located at standard PC I/O addresses. Connector J8 provides interfaces to the COM ports. See Table 6 for COM port signal and pinout information. COM1 is an RS-232 (115.2K baud) serial port. COM3 and COM4 can be operated in RS-422 or RS-485 modes. Additional non-standard baud rates are also available (programmable in the normal baud registers) of up to 460K baud.
Interfaces and Connectors IDE Hard Drive / CD-ROM Interfaces The IDE interface is available to connect up to two IDE devices, such as hard disks, CD-ROM drives, or CompactFlash. Connector J7 is the primary IDE controller with a 44-pin 2 mm latching connector. Use CMOS setup to specify the drive parameters of the drive. If you use the on-board CompactFlash device, only one other IDE device can be connected to the IDE controller. Cable length must be 18" or less to maintain proper signal integrity.
Interfaces and Connectors J8 Utility Connector The J8 50-pin utility connector incorporates the COM ports, USB ports, LEDs, speaker, and the reset button. Table 6 illustrates the function of each pin and the pinout assignments to connectors on the CBR-5010 breakout board.
Interfaces and Connectors USB INTERFACE Connector J8 includes interfaces for four USB ports. The USB interface on the EPM-15 is UHCI (Universal Host Controller Interface) and EHCI (Enhance Host Controller Interface) compatible, which provides a common industry software/hardware interface. There are four USB connectors on the CBR-5010 breakout board. BIOS Configuration The USB controller can be enabled or disabled in the CMOS setup. The USB controller uses PCI interrupt “INTD#”.
Interfaces and Connectors Parallel Port The EPM-15 includes a standard bi-directional/EPP/ECP compatible LPT port which resides at the PC standard address of 378h. The port can be enabled or disabled and interrupt assignments can be made via CMOS Setup. The LPT mode is also set via CMOS Setup. This connector uses IEC 61000-4-2-rated TVS components to help protect against ESD damage.
Interfaces and Connectors Video Interface An on-board video controller integrated into the chipset provides high performance video output for the EPM-15. (The EPM-15 can also be operated without video card attached. See “Console Redirection.”) CONFIGURATION The EPM-15 uses a shared-memory architecture. This allows the video controller to use 16 MB of system DRAM for video RAM. The EPM-15 supports two types of video output, SVGA and LVDS Flat Panel Display.
Interfaces and Connectors LVDS FLAT PANEL DISPLAY CONNECTOR The integrated LVDS Flat Panel Display in the EPM-15 is an ANSI/TIA/EIA-644-1995 specification-compliant interface. It can support up to 24 bits of RGB pixel data plus 3 bits of timing control (HSYNC/VSYNC/DE) on the 4 differential data output pairs. The LVDS clock frequency ranges from 25 MHz to 85 MHz. The 3.3V power provided to pins 19 and 20 of J12 is protected by a 1 Amp fuse. See Figure 8 for connector location information.
Interfaces and Connectors COMPATIBLE LVDS PANEL DISPLAYS The following list of flat panel displays is reported to work properly with the integrated graphics video controller chip used on the EPM-15. Table 10: Compatible Flat Panel Displays Manufacturer eVision Displays au Optronix eVision Displays au Optronix Sharp eVision Displays* Model Number Panel Size Resolution Interface Panel Technology xxx084S01 series B084SN01 xxx104S01 series B104SN01 LQ121S1LG411 xxx141X01 series 8.4” 8.4” 10.4” 10.4” 12.
Interfaces and Connectors Null Modem The following diagram illustrates a typical DB9 to DB9 RS-232 null modem adapter. System 1 <--> System 2 Name Pin Pin Name -----------------------------------TX 3 <--> 2 RX RX 2 <--> 3 TX RTS 7 <--> 1 DCD CTS 8 DSR 6 <--> 4 DTR DCD 1 <--> 7 RTS 8 CTS DTR 4 <--> 6 DSR Pins 7 and 8 are shorted together on each connector. Unlisted pins have no connection.
Interfaces and Connectors Ethernet Interface The EPM-15 features an on-board Ethernet controller. For the EPM-15g and h, the controller is the Intel 82551ER Fast Ethernet controller. For the EPM-15S and E, the controller is the Intel 82541ER controller. While these controllers are not NE2000-compatible, they are widely supported. Drivers are readily available to support a variety of operating systems. See VersaLogic website for latest OS support.
Interfaces and Connectors Audio The audio interface on the EPM-15 is implemented using the Analog Devices AD1981B Audio Codec (EPM-15g, h) or the National Semiconductor LM4549B (EPM-15S, E). This interface is AC ’97 2.1 compatible. Drivers are available for most Windows-based operating systems. To obtain the most current versions, consult the EPM-15 product support page. J13 provides the line-level stereo input and line-level stereo output connection points.
Interfaces and Connectors PC/104 Expansion Bus EPM-15 has limited support of the PC/104 bus. Most PC/104 cards will work, but be sure to check the requirements of your PC/104 card against the list below.
System Resources and Maps 6 Memory Map The lower 1 MB memory map of the EPM-15 is arranged as shown in the following table. Various blocks of memory space between C0000h and FFFFFh can be shadowed. The CMOS setup is used to enable or disable this feature.
System Resources and Maps Interrupt Configuration The EPM-15 has the standard complement of PC type interrupts. Three non-shared interrupts are routed to the PC/104 bus, and up to four IRQ lines can be allocated as needed to PCI devices. There are no interrupt configuration jumpers. All configuration is handled through CMOS Setup.
Special Registers 7 Special Control Register SCR (READ/WRITE) 1D0h D7 D6 D5 D4 D3 D2 D1 D0 PLED Reserved OVERTEMP Reserved Reserved Reserved Reserved Reserved Table 16: Special Control Register Bit Assignments Bit D7 Mnemonic PLED D6 Reserved D5 OVERTEMP Description Light Emitting Diode — Controls the programmable LED on connector J4 0= Turns LED on 1= Turns LED off Reserved — This bit has no function. Temperature Status — Indicates CPU temperature.
Special Registers Revision Indicator Register REVIND (READ ONLY) 1D1h D7 D6 D5 D4 D3 D2 D1 D0 PC4 PC3 PC2 PC1 PC0 EXT REV1 REV0 This register is used to indicate the revision level of the EPM-15. Table 17: Revision Indicator Register Bit Assignments Bit Mnemonic Description D7-D3 PC Product Code — These bits are hard-coded to represent the product type. The EPM-15 always reads as 00011. Other codes are reserved for future products.
Special Registers Jumper and Status Register JSR (READ/WRITE) 1D2h D7 D6 D5 D4 D3 D2 D1 D0 Reserved VB-SEL SB-SEL Reserved Reserved Reserved Reserved Reserved Table 18: Jumper and Status Register Bit Assignments Bit Mnemonic D7 Reserved D6 VB-SEL D5 SB-SEL Description This bit has no function. Video BIOS Selection — Indicates the status of jumper. 0= Jumper out, Secondary Video BIOS selected. 1= Jumper in, Primary Video BIOS selected. This bit is read-only.
Special Registers RS-485/422 Transmit/Receive Control Register RS485/422 (READ/WRITE) 1DAh D7 Reserved D6 D5 D4 COM4TE485 COM4RE4XX COM4TE422 D3 Reserved D2 D1 D0 COM3TE485 COM3RE4XX COM3TE422 Table 19: RS-485/422 Tx/Rx Register Bit Assignments Bit Mnemonic Description D7 Reserved D6 COM4TE485 COM4 RS-485 Transmit Enable — Controls RS-485 Tx on COM4. 0= Disable RS-485 transmitter on COM4. 1= Enable RS-485 transmitter on COM4. This bit has no function.
Appendix A – References PC Chipset AMD LX Chipset Advanced Micro Devices Ethernet Controller Intel 82551ER Intel 82541ER Intel Corporation Video Controller In chipset.
Appendix B – Generated Frequencies B The following frequencies on the EPM-15 board can be measured for EMI/EMC testing. Table 20: Generated Frequencies Component Frequencies Notes 10/100 Ethernet 25 MHz Y1 crystal, U7 82551ER chip. RTC 32.768 kHz Y2 crystal, U13A CS5536 chip. System Clock REF Clock IOAPC Clock PCI Clock 14.318 MHz 14.318 MHz 14.318 MHz 33.3 MHz Y3 crystal, U34 MK1491-09F chip. USB 48 MHz Y4 crystal, U13B CS5536 chip. Audio 24.576 MHz Y5 crystal, U44 AD1981B chip.
