Specifications

DX-BT24-T MODULE SPECIFICATION
Shenzhen DX-SMART Technology Co., Ltd. www.szdx-smart.com
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2.6.4. SPI Interface
 Master and slave mode
 From 4bit to 32bit operation
 Main clock up to 32MHz
 Support DMA
This controller implements serial peripheral interface (SPI™) in master-slave mode. The serial
interface can transmit and receive from 4-bit to 32-bit in master/slave mode. The controller
includes separate TX and RXFIFOs and DMA handshake support. From the mode clock speed is
independent of the system clock speed. In addition, the master clock speed can be as fast as the
system clock speed. The controller can generate an interrupt when X or RXFIFOs reach the data
threshold.
Figure 11：SPI communication timing diagram
2.6.5. Analog-to-digital Converter（ADC）
 Typical 10-bit dynamic ADC of 125 ns
 Maximum sampling rate was 1 Msample/s
 Ultra-low power consumption (20 uA Typical power supply current, 100 ksample/s)
 Configurable attenuator: 1x, 2x,3x, 4x
The device integrates a 10-bit high-speed and ultra-low-power general-purpose
analog-to-digital converter (ADC). It can operate in unipolar (single-ended> mode and
bipolar (differential) mode. ADC has its own 0.9v regulator (LDO), which represents the
full-scale reference voltage