Product Info

DS-2472-01 <Rev.0.0>
page 28/ 63
4. Application Guide
4.1. Initialization
After DKL 1908_V.1 is powered on, some registers need to be configured before the data transmitting or
reception. The procedure is described as below.
DKL 1908_V.1 Initialization (4-wire SPI)*
Register Note
do{Uz2472WriteReg(0x05,0x5c);}
while((Uz2472ReadReg(0x05) &
0x5c) != 0x5c);
Wait power on stable.
REG0x34=0x0F Software reset for BB, MAC and register
REG0x10=0x0A
Channel Setting for calibration (Initial setting
Channel_2410 MHz)
REG0x13=0x8C VCO Settling Time
REG0x14=0x02 VCO Settling Time
REG0x16=0xFF Power setting Max. output power
REG0x37=0x02 RF setting
REG0x38=0x82 Data Rate Select 250Kbps
REG0x14=0x06 RF optimized control
REG0x36=0x20 RF optimized control
REG0x37=0x12 RF optimized control
Wait 2mS
REG0x12=0x6A RF optimized control
Wait 8mS
REG0x12=0x68 RF optimized control
REG0x37=0x02
RF optimized control
REG0x36=0x00 RF optimized control
REG0x14=0x02 RF optimized control
REG0x32=0x00
REG0x32=0x09  Polling process for TX/RX
REG0x32=0x00  Interrupt process for TX/RX
Initialization Option Items
Register Notes
REG0x0D=0x02
Disable TX trigger after register wakeup
REG0x00=0x40
MAC header format consistence with DKL 1908_V.1
REG0x17=0x01
Sleep mode is Deep Sleep mode