Product Specs
Table Of Contents
- FEATURESAPPLICATIONS
- GENERAL DESCRIPTION
- QUICK REFERENCE DATA
- PIN FUNCTIONS
- ELECTRICAL SPECIFICATIONS
- Package marking:
- Absolute Maximum Ratings
- Temperatures
- ATTENTION!
- Glossary of Terms
- FUNCTIONAL DESCRIPTION
- Pin functions in the different modes of nRF24L01
- Standby Modes
- Power Down Mode
- Packet Handling Methods
- ShockBurst™
- Enhanced ShockBurst™
- Enhanced ShockBurst™ Transmitting Payload:
- Enhanced ShockBurstTM Receive Payload:
- DEVICE CONFIGURATION
- SPI Interface
- SPI Instruction Set
- Interrupt
- SPI Timing
- Memory Map
- Configuration for compatibility with nRF24XX
- PACKET DESCRIPTION
- IMPORTANT TIMING DATA
- nRF24L01 Timing Information
- Enhanced ShockBurst™ timing
- PERIPHERAL RF INFORMATION
- Output Power adjustment
- Crystal Specification
- nRF24L01 sharing crystal with a micro controller.
- Crystal parameters:
- Input crystal amplitude & Current consumption
- PCB layout and de-coupling guidelines
- APPLICATION EXAMPLE
- DEFINITIONS
- LIFE SUPPORT APPLICATIONS
- YOUR NOTES
- 空白页面
- 空白页面
- 空白页面
- 空白页面
PRELIMINARY PRODUCT SPECIFICATION
nRF24L01 Single Chip 2.4 GHz Radio Transceiver
Nordic Semiconductor ASA - Vestre Rosten 81, N-7075 Tiller, Norway - Phone +4772898900 - Fax +4772898989
Page 21 of 38
Revision: 1.1
November 2005
Memory Map
All undefined bits in the table below are redundant. They will be read out as '0'.
Address
(Hex)
Mnemonic
Bit
Reset
Value
Type
Description
00
CONFIG
Configuration Register
Reserved
7
0
R/W
Only '0' allowed
MASK_RX_DR
6
0
R/W
Mask interrupt caused by RX_RD
1: Interrupt not reflected on the IRQ pin
0: Reflect RX_DR as active low interrupt
on the IRQ pin
MASK_TX_DS
5
0
R/W
Mask interrupt caused by TX_DS
1: Interrupt not reflected on the IRQ pin
0: Reflect TX_DS as active low interrupt
on the IRQ pin
MASK_MAX_RT
4
0
R/W
Mask interrupt caused by MAX_RT
1: Interrupt not reflected on the IRQ pin
0: Reflect MAX_RT as active low
interrupt on the IRQ pin
EN_CRC
3
1
R/W
Enable CRC. Forced high if one of the
bits in the EN_AA is high
CRCO
2
0
R/W
CRC encoding scheme
'0' - 1 byte
'1' – 2 bytes
PWR_UP
1
0
R/W
1: POWER UP, 0:POWER DOWN
PRIM_RX
0
0
R/W
1: PRX, 0: PTX
01
EN_AA
Enhanced
ShockBurst™
Enable ‘Auto Acknowledgment’ Function
Disable this functionality to be
compatible with nRF2401, see page 25
Reserved
7:6
00
R/W
Only '00' allowed
ENAA_P5
5
1
R/W
Enable auto ack. data pipe 5
ENAA_P4
4
1
R/W
Enable auto ack. data pipe 4
ENAA_P3
3
1
R/W
Enable auto ack. data pipe 3
ENAA_P2
2
1
R/W
Enable auto ack. data pipe 2
ENAA_P1
1
1
R/W
Enable auto ack. data pipe 1
ENAA_P0
0
1
R/W
Enable auto ack. data pipe 0
02
EN_RXADDR
Enabled RX Addresses
Reserved
7:6
00
R/W
Only '00' allowed
ERX _P5
5
0
R/W
Enable data pipe 5.
ERX _P4
4
0
R/W
Enable data pipe 4.
ERX _P3
3
0
R/W
Enable data pipe 3.
ERX _P2
2
0
R/W
Enable data pipe 2.
ERX _P1
1
1
R/W
Enable data pipe 1.
ERX _P0
0
1
R/W
Enable data pipe 0.
03
SETUP_AW
Setup of Address Widths
(common for all data pipes)
Reserved
7:2
000000
R/W
Only '000000' allowed
AW
1:0
11
R/W
RX/TX Address field width
'00' - Illegal
'01' - 3 bytes
'10' - 4 bytes
'11' – 5 bytes
LSByte will be used if address width
below 5 bytes
04
SETUP_RETR
Setup of Automatic Retransmission
ARD
7:4
0000
R/W
Auto Re-transmit Delay