Data Sheet

FSC‐BW226Datasheet
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 ShenzhenFeasycomTechnologyCo.,Ltd.www.feasycom.com
‐10‐
signalcoverage.
Ifyou need touse an external antenna,by modifyingthe module on the 0Rresistance toblock outthe
on‐boardantenna;OrcontactFeasycomformodification.
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4.PHYSICALINTERFACE
 4.1PowerSupply
Thetransient response of the regulatorisimportant.Ifthe power rails of themodulearesupplied from anexternal
voltagesource,thetransientresponseofanyregulatorusedshouldbe20μsorless.Itisessentialthatthepowerrail
recoversquickly.
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 4.2AudioInterfaces
4.2.1PCMFormat
FrameSyncisthesynchronizingfunctionusedtocontrolthetransferofDAC_DataandADC_Data.ALong FrameSync
indicatesthestartofADC_DataattherisingedgeofFrameSync(Figure4),andaShortFrameSyncindicatesthestartof
ADC_DataatthefallingedgeofFrameSync(Figure5)
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Figure
4:FSC‐BW226LongFrameSync(BTonly)
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Figure5:FSC‐BW226ShortFrameSync(BTonly)
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 4.3Reset
Themodulemayberesetfromseveralsources:Power‐onReset(POR),LowlevelonthenRESETPin(nRST),Watchdog
time‐outreset(WDT),Lowvoltagereset(LVR)orSoftwareReset(SYSRESETREQ,CPUReset,CHIPRST).
TheRESETpinisanactivelowresetandisinternallyfilteredusingtheinternallowfrequency
clockoscillator.Areset
willbeperformedbetween1.5and4.0msfollowingRESETbeingactive.ItisrecommendedthatRESETbeappliedfora
periodgreaterthan5ms.