User Manual

Technical specifications
A.2 CPU modules
Easy Book
290 Manual, 03/2014, A5E02486774-AF
CPU features
CPU 1211C
CPU 1212C
CPU 1214C
CPU 1215C
CPU 1217C
Process image size
• Inputs
• Outputs
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
• 1024 bytes
Bit memory (M)
4096 bytes
4096 bytes
8192 bytes
8192 bytes
8192 bytes
Temporary (local) memory
• 16 Kbytes for startup and program cycle (including associated FBs and FCs)
• 6 Kbytes for each of the other interrupt priority levels (including FBs and FCs)
SM expansion
None
2 SMs max.
8 SMs max.
8 SMs max.
8 SMs max.
SB, CB, or BB expansion
1 max.
1 max.
1 max.
1 max.
1 max.
CM expansion
3 max.
3 max.
3 max.
3 max.
3 max
High-
speed
counters
Total
Up to 6 configured to use any built-in or SB inputs
1 MHz -- -- -- -- Ib.2 to Ib.5
(Differential)
100/
1
80 kHz
Ia.0 to Ia.5
Ia.0 to Ia.5
Ia.0 to Ia.5
Ia.0 to Ia.5
Ia.0 to Ia.5
30/
1
20 kHz
--
Ia.6 to Ia.7
Ia.6 to Ib.5
Ia.6 to Ib.5
Ia.6 to Ib.1
Pulse
outputs
2
Total Up to 4 configured to use any built-in or SB outputs
1 MHz -- -- -- -- Qa.0 to Qa.3
(Differential)
100 kHz
Qa.0 to Qa.3
Qa.0 to Qa.3
Qa.0to Qa.3
Qa.0 to Qa.3
Qa.4 to Qb.1
30 kHz
--
Qa.4 to Qa.5
Qa.4 to Qb.1
Qa.4 to Qb.1
--
Pulse catch inputs
6
8
14
14
14
Time delay interrupts 4 total with 1 ms
resolution
4 total with 1 ms
resolution
4 total with 1 ms
resolution
4 total with 1 ms
resolution
4 total with 1 ms
resolution
Cyclic interrupts 4 total with 1 ms
resolution
4 total with 1 ms
resolution
4 total with 1 ms
resolution
4 total with 1 ms
resolution
4 total with 1 ms
resolution
Edge interrupts
With optional SB
6 rising and 6
falling
10 rising and 10
falling
8 rising and 8
falling
12 rising and 12
falling
12 rising and 12
falling
16 rising and 16
falling
12 rising and 12
falling
16 rising and 16
falling
12 rising and 12
falling
16 rising and 16
falling